From patchwork Wed Aug 12 13:34:09 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: arun.siluvery@linux.intel.com X-Patchwork-Id: 7001451 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 01E649F358 for ; Wed, 12 Aug 2015 13:34:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2F12620571 for ; Wed, 12 Aug 2015 13:34:18 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id D1A0B2054A for ; Wed, 12 Aug 2015 13:34:16 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 63AEE6E1C9; Wed, 12 Aug 2015 06:34:16 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 45E6C6E1C9 for ; Wed, 12 Aug 2015 06:34:15 -0700 (PDT) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP; 12 Aug 2015 06:34:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,661,1432623600"; d="scan'208";a="624095157" Received: from asiluver-linux.isw.intel.com ([10.102.226.117]) by orsmga003.jf.intel.com with ESMTP; 12 Aug 2015 06:34:13 -0700 From: Arun Siluvery To: intel-gfx@lists.freedesktop.org Date: Wed, 12 Aug 2015 14:34:09 +0100 Message-Id: <1439386449-10186-1-git-send-email-arun.siluvery@linux.intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1438968817-29286-1-git-send-email-arun.siluvery@linux.intel.com> References: <1438968817-29286-1-git-send-email-arun.siluvery@linux.intel.com> Cc: Mika Kuoppala , Ben Widawsky Subject: [Intel-gfx] [PATCH v2] drm/i915:gen9: Add WA for disable gather at set shader bit X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This WA doesn't have a name. According to WA ID 0555 in spec, driver need to reset disable gather at set shader bit in per ctx WA batch. It is to be noted that the default value is already '0' for this bit but we still need to apply this WA because userspace may set it. If userspace really need it to be set then they need to do in every batch. Cc: Ben Widawsky Cc: Joonas Lahtinen Cc: Mika Kuoppala Signed-off-by: Arun Siluvery Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com) --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_lrc.c | 9 +++++++++ 2 files changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 7456bd2..d60a510 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -5834,6 +5834,7 @@ enum skl_disp_power_wells { # define GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC ((1<<10) | (1<<26)) # define GEN9_RHWO_OPTIMIZATION_DISABLE (1<<14) #define COMMON_SLICE_CHICKEN2 0x7014 +#define GEN9_DISABLE_GATHER_SET_SHADER_SLICE (1<<12) # define GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE (1<<0) #define HIZ_CHICKEN 0x7018 diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 5559ed9..e79be4c 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -1305,6 +1305,15 @@ static int gen9_init_perctx_bb(struct intel_engine_cs *ring, struct drm_device *dev = ring->dev; uint32_t index = wa_ctx_start(wa_ctx, *offset, CACHELINE_DWORDS); + /* WaNoName:skl,bxt + * This WA has no name, WA ID 0555 in spec says, driver needs to reset + * "disable gather at set shader slice" bit in per ctx batch + */ + wa_ctx_emit(batch, index, MI_LOAD_REGISTER_IMM(1)); + wa_ctx_emit(batch, index, COMMON_SLICE_CHICKEN2); + wa_ctx_emit(batch, index, + _MASKED_BIT_DISABLE(GEN9_DISABLE_GATHER_SET_SHADER_SLICE)); + /* WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken:skl,bxt */ if ((IS_SKYLAKE(dev) && (INTEL_REVID(dev) <= SKL_REVID_B0)) || (IS_BROXTON(dev) && (INTEL_REVID(dev) == BXT_REVID_A0))) {