From patchwork Sun Aug 23 12:22:51 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 7057591 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6D7569F373 for ; Sun, 23 Aug 2015 12:21:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D24DB20499 for ; Sun, 23 Aug 2015 12:21:47 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id D6359204FF for ; Sun, 23 Aug 2015 12:21:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0BA446E910; Sun, 23 Aug 2015 05:21:46 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 7254D6E90A for ; Sun, 23 Aug 2015 05:21:45 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 23 Aug 2015 05:21:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,732,1432623600"; d="scan'208";a="789226895" Received: from sakamble-desktop.iind.intel.com ([10.223.82.56]) by fmsmga002.fm.intel.com with ESMTP; 23 Aug 2015 05:21:44 -0700 From: Sagar Arun Kamble To: intel-gfx@lists.freedesktop.org Date: Sun, 23 Aug 2015 17:52:51 +0530 Message-Id: <1440332571-20761-6-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1440332571-20761-1-git-send-email-sagar.a.kamble@intel.com> References: <1440332571-20761-1-git-send-email-sagar.a.kamble@intel.com> Subject: [Intel-gfx] [PATCH 5/5] drm/i915: Notify Coarse Power Gating changes to GuC X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Alex Dai Signed-off-by: Alex Dai Signed-off-by: Sagar Arun Kamble --- drivers/gpu/drm/i915/i915_guc_submission.c | 18 ++++++++++++++++++ drivers/gpu/drm/i915/intel_guc.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 16 ++++++++++++---- 3 files changed, 31 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c index ec70393..462c679 100644 --- a/drivers/gpu/drm/i915/i915_guc_submission.c +++ b/drivers/gpu/drm/i915/i915_guc_submission.c @@ -877,6 +877,24 @@ int i915_guc_submission_enable(struct drm_device *dev) return 0; } +void i915_guc_sample_forcewake(struct drm_device *dev, u32 fw_data) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + struct intel_guc *guc = &dev_priv->guc; + struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw; + + /* Notify GuC about CPG changes. */ + if (guc_fw->guc_fw_fetch_status == GUC_FIRMWARE_SUCCESS) { + u32 data[2]; + + data[0] = HOST2GUC_ACTION_SAMPLE_FORCEWAKE; + data[1] = fw_data; + + if (host2guc_action(guc, data, 2)) + DRM_ERROR("Unable to notify GuC of CPG change\n"); + } +} + void i915_guc_submission_disable(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h index 4ec2d27..691574d 100644 --- a/drivers/gpu/drm/i915/intel_guc.h +++ b/drivers/gpu/drm/i915/intel_guc.h @@ -118,5 +118,6 @@ int i915_guc_submit(struct i915_guc_client *client, struct drm_i915_gem_request *rq); void i915_guc_submission_disable(struct drm_device *dev); void i915_guc_submission_fini(struct drm_device *dev); +void i915_guc_sample_forcewake(struct drm_device *dev, u32 fw_data); #endif diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index c0345d2..4a0483c 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4616,6 +4616,9 @@ static void gen9_disable_rps(struct drm_device *dev) struct drm_i915_private *dev_priv = dev->dev_private; I915_WRITE(GEN6_RC_CONTROL, 0); + + i915_guc_sample_forcewake(dev, 0); + I915_WRITE(GEN9_PG_ENABLE, 0); } @@ -4804,6 +4807,7 @@ static void gen9_enable_rc6(struct drm_device *dev) struct drm_i915_private *dev_priv = dev->dev_private; struct intel_engine_cs *ring; uint32_t rc6_mask = 0; + uint32_t cpg_data = 0; int unused; /* 1a: Software RC state - RC0 */ @@ -4843,11 +4847,15 @@ static void gen9_enable_rc6(struct drm_device *dev) * WaRsDisableCoarsePowerGating:skl,bxt - Render/Media PG need to be disabled with RC6. */ if ((IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0)) || - (IS_SKYLAKE(dev) && (INTEL_REVID(dev) <= SKL_REVID_E0))) + (IS_SKYLAKE(dev) && (INTEL_REVID(dev) <= SKL_REVID_E0))) { + i915_guc_sample_forcewake(dev, 0); I915_WRITE(GEN9_PG_ENABLE, 0); - else - I915_WRITE(GEN9_PG_ENABLE, (rc6_mask & GEN6_RC_CTL_RC6_ENABLE) ? - (GEN9_RENDER_PG_ENABLE | GEN9_MEDIA_PG_ENABLE) : 0); + } else { + cpg_data = (rc6_mask & GEN6_RC_CTL_RC6_ENABLE)? + (GEN9_RENDER_PG_ENABLE | GEN9_MEDIA_PG_ENABLE):0; + i915_guc_sample_forcewake(dev, cpg_data); + I915_WRITE(GEN9_PG_ENABLE, cpg_data); + } intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);