From patchwork Tue Aug 25 20:06:05 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 7072951 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 52AE2C05AC for ; Tue, 25 Aug 2015 20:06:23 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8741720887 for ; Tue, 25 Aug 2015 20:06:22 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 221F92088D for ; Tue, 25 Aug 2015 20:06:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A64FB6EB9B; Tue, 25 Aug 2015 13:06:20 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 05EB76EB9B for ; Tue, 25 Aug 2015 13:06:18 -0700 (PDT) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP; 25 Aug 2015 13:05:51 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,747,1437462000"; d="scan'208";a="632106005" Received: from amanna-desktop.iind.intel.com ([10.223.25.39]) by orsmga003.jf.intel.com with ESMTP; 25 Aug 2015 13:05:48 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Wed, 26 Aug 2015 01:36:05 +0530 Message-Id: <1440533169-32265-2-git-send-email-animesh.manna@intel.com> X-Mailer: git-send-email 2.0.2 In-Reply-To: <1440533169-32265-1-git-send-email-animesh.manna@intel.com> References: <1440533169-32265-1-git-send-email-animesh.manna@intel.com> Cc: Daniel Vetter Subject: [Intel-gfx] [DMC_BUGFIX_SKL_V2 1/5] drm/i915/skl: Added a check for the hardware status of csr fw before loading. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Dmc will restore the csr program except DC9, cold boot, warm reset, PCI function level reset, and hibernate/suspend. intel_csr_load_program() function is used to load the firmware data from kernel memory to csr address space. All values of csr address space will be zero if it got reset and the first byte of csr program is always a non-zero if firmware is loaded successfuly. Based on hardware status will load the firmware. Without this condition check if we overwrite the firmware data the counters exposed for dc5/dc6 (help for debugging) will be nullified. v1: Initial version. v2: Based on review comments from Daniel, - Added a check to know hardware status and load the firmware if not loaded. Cc: Daniel Vetter Cc: Damien Lespiau Cc: Imre Deak Cc: Sunil Kamath Signed-off-by: Animesh Manna Signed-off-by: Vathsala Nagaraju Reviewed-by: A.Sunil Kamath --- drivers/gpu/drm/i915/intel_csr.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c index ba1ae03..682cc26 100644 --- a/drivers/gpu/drm/i915/intel_csr.c +++ b/drivers/gpu/drm/i915/intel_csr.c @@ -252,6 +252,15 @@ void intel_csr_load_program(struct drm_device *dev) return; } + /* + * Dmc will restore the csr the program except DC9, cold boot, + * warm reset, PCI function level reset, and hibernate/suspend. + * This condition will help to check if csr address space is reset/ + * not loaded. + */ + if (I915_READ(CSR_PROGRAM_BASE)) + return; + mutex_lock(&dev_priv->csr_lock); fw_size = dev_priv->csr.dmc_fw_size; for (i = 0; i < fw_size; i++)