| Message ID | 1440747679-20716-4-git-send-email-zhiyuan.lv@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On pe, 2015-08-28 at 15:41 +0800, Zhiyuan Lv wrote: > Broadwell hardware supports both ring buffer mode and execlist mode. > When i915 runs inside a VM with Intel GVT-g, we allow execlist mode > only. > > The main reason of EXECLIST only is that GVT-g does not support the > dynamic mode switch between ring buffer mode and execlist mode when > running multiple virtual machines. > > v2: > - Adjust the position of vgpu check in sanitize function (Joonas) > - Add vgpu error check in context initialization. (Joonas, Daniel) > > Signed-off-by: Zhiyuan Lv <zhiyuan.lv@intel.com> > Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > --- > drivers/gpu/drm/i915/i915_gem_context.c | 7 +++++++ > drivers/gpu/drm/i915/intel_lrc.c | 6 ++++++ > 2 files changed, 13 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_gem_context.c > b/drivers/gpu/drm/i915/i915_gem_context.c > index 8e893b3..74aa0c9 100644 > --- a/drivers/gpu/drm/i915/i915_gem_context.c > +++ b/drivers/gpu/drm/i915/i915_gem_context.c > @@ -332,6 +332,13 @@ int i915_gem_context_init(struct drm_device > *dev) > if (WARN_ON(dev_priv->ring[RCS].default_context)) > return 0; > > + if (intel_vgpu_active(dev) && > HAS_LOGICAL_RING_CONTEXTS(dev)) { > + if (!i915.enable_execlists) { > + DRM_INFO("Only EXECLIST mode is supported in > vgpu.\n"); > + return -EINVAL; > + } > + } > + > if (i915.enable_execlists) { > /* NB: intentionally left blank. We will allocate > our own > * backing objects as we need them, thank you very > much */ > diff --git a/drivers/gpu/drm/i915/intel_lrc.c > b/drivers/gpu/drm/i915/intel_lrc.c > index 258af9b..e9520af 100644 > --- a/drivers/gpu/drm/i915/intel_lrc.c > +++ b/drivers/gpu/drm/i915/intel_lrc.c > @@ -236,6 +236,12 @@ int intel_sanitize_enable_execlists(struct > drm_device *dev, int enable_execlists > { > WARN_ON(i915.enable_ppgtt == -1); > > + /* On platforms with execlist available, vGPU will only > + * support execlist mode, no ring buffer mode. > + */ > + if (HAS_LOGICAL_RING_CONTEXTS(dev) && > intel_vgpu_active(dev)) > + return 1; > + > if (INTEL_INFO(dev)->gen >= 9) > return 1; >
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index 8e893b3..74aa0c9 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c @@ -332,6 +332,13 @@ int i915_gem_context_init(struct drm_device *dev) if (WARN_ON(dev_priv->ring[RCS].default_context)) return 0; + if (intel_vgpu_active(dev) && HAS_LOGICAL_RING_CONTEXTS(dev)) { + if (!i915.enable_execlists) { + DRM_INFO("Only EXECLIST mode is supported in vgpu.\n"); + return -EINVAL; + } + } + if (i915.enable_execlists) { /* NB: intentionally left blank. We will allocate our own * backing objects as we need them, thank you very much */ diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 258af9b..e9520af 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -236,6 +236,12 @@ int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists { WARN_ON(i915.enable_ppgtt == -1); + /* On platforms with execlist available, vGPU will only + * support execlist mode, no ring buffer mode. + */ + if (HAS_LOGICAL_RING_CONTEXTS(dev) && intel_vgpu_active(dev)) + return 1; + if (INTEL_INFO(dev)->gen >= 9) return 1;