From patchwork Thu Sep 3 19:51:44 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zanoni, Paulo R" X-Patchwork-Id: 7118941 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A1A8F9F1D5 for ; Thu, 3 Sep 2015 19:52:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BED61207C5 for ; Thu, 3 Sep 2015 19:52:03 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id B5C7E207CD for ; Thu, 3 Sep 2015 19:52:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3B1636E838; Thu, 3 Sep 2015 12:52:02 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id B054F6E838 for ; Thu, 3 Sep 2015 12:52:00 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga103.fm.intel.com with ESMTP; 03 Sep 2015 12:52:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,463,1437462000"; d="scan'208";a="797724720" Received: from bpilney-mobl1.amr.corp.intel.com (HELO panetone.amr.corp.intel.com) ([10.255.92.27]) by fmsmga002.fm.intel.com with ESMTP; 03 Sep 2015 12:52:00 -0700 From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Thu, 3 Sep 2015 16:51:44 -0300 Message-Id: <1441309905-2744-4-git-send-email-paulo.r.zanoni@intel.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1441309905-2744-1-git-send-email-paulo.r.zanoni@intel.com> References: <1441309905-2744-1-git-send-email-paulo.r.zanoni@intel.com> Subject: [Intel-gfx] [PATCH 3/4] drm/i915: remove intel_uncore_check_errors() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP I added this code on 8664281b64c457705db72fc60143d03827e75ca9, on April 12 2013. Back then, we only had support for detecting unclaimed registers on I915_WRITE operations, and we didn't have the i915.mmio_debug infrastructure. I tried to remember exactly why I added this code, and the only reason I can think is: to help debugging. With this code, we would be able to differentiate between the "your interrupt handler did something wrong" and the "something bad happened before the interrupt handler" cases, at the cost of one extra register read operation per interrupt. Since then, we added unclaimed register checking support for I915_READ, we added the i915.mmio_debug infrastructure and we also fixed most (all?) of the unclaimed register problems on HSW. Due to this, I don't think the extra register read at every interrupt is necesary anymore: we're probably good in terms of debugging. So let's kill this function in order to make sure it completely disappears from perf. Notice that this only affects HSW. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_drv.h | 1 - drivers/gpu/drm/i915/i915_irq.c | 4 ---- drivers/gpu/drm/i915/intel_uncore.c | 11 ----------- 3 files changed, 16 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 1287007..194e864 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2703,7 +2703,6 @@ extern void intel_uncore_sanitize(struct drm_device *dev); extern void intel_uncore_early_sanitize(struct drm_device *dev, bool restore_forcewake); extern void intel_uncore_init(struct drm_device *dev); -extern void intel_uncore_check_errors(struct drm_device *dev); extern void intel_uncore_fini(struct drm_device *dev); extern void intel_uncore_forcewake_reset(struct drm_device *dev, bool restore); const char *intel_uncore_forcewake_domain_to_str(const enum forcewake_domain_id id); diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 2063279..57ec55e 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2064,10 +2064,6 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg) if (!intel_irqs_enabled(dev_priv)) return IRQ_NONE; - /* We get interrupts on unclaimed registers, so check for this before we - * do any I915_{READ,WRITE}. */ - intel_uncore_check_errors(dev); - /* disable master interrupt before clearing iir */ de_ier = I915_READ(DEIER); I915_WRITE(DEIER, de_ier & ~DE_MASTER_IRQ_CONTROL); diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 65e0ea8..8844c314 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -1554,14 +1554,3 @@ bool intel_has_gpu_reset(struct drm_device *dev) { return intel_get_gpu_reset(dev) != NULL; } - -void intel_uncore_check_errors(struct drm_device *dev) -{ - struct drm_i915_private *dev_priv = dev->dev_private; - - if (HAS_FPGA_DBG_UNCLAIMED(dev) && - (__raw_i915_read32(dev_priv, FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) { - DRM_ERROR("Unclaimed register before interrupt\n"); - __raw_i915_write32(dev_priv, FPGA_DBG, FPGA_DBG_RM_NOCLAIM); - } -}