From patchwork Tue Sep 8 12:27:56 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ander Conselvan de Oliveira X-Patchwork-Id: 7140651 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 504D5BEEC1 for ; Tue, 8 Sep 2015 12:28:20 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7D3BE206EA for ; Tue, 8 Sep 2015 12:28:19 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 915D2206E5 for ; Tue, 8 Sep 2015 12:28:18 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0D2956E455; Tue, 8 Sep 2015 05:28:18 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id E4F506E455 for ; Tue, 8 Sep 2015 05:28:16 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga103.fm.intel.com with ESMTP; 08 Sep 2015 05:28:16 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,489,1437462000"; d="scan'208";a="800594505" Received: from linux.intel.com ([10.23.219.25]) by fmsmga002.fm.intel.com with ESMTP; 08 Sep 2015 05:28:16 -0700 Received: from localhost (aconselv-mobl3.ger.corp.intel.com [10.252.9.149]) by linux.intel.com (Postfix) with ESMTP id 5010C6A4083; Tue, 8 Sep 2015 05:27:24 -0700 (PDT) From: Ander Conselvan de Oliveira To: intel-gfx@lists.freedesktop.org Date: Tue, 8 Sep 2015 15:27:56 +0300 Message-Id: <1441715280-11623-6-git-send-email-ander.conselvan.de.oliveira@intel.com> X-Mailer: git-send-email 2.4.3 In-Reply-To: <1441715280-11623-1-git-send-email-ander.conselvan.de.oliveira@intel.com> References: <1441715280-11623-1-git-send-email-ander.conselvan.de.oliveira@intel.com> Cc: jani.nikula@intel.com, Ander Conselvan de Oliveira Subject: [Intel-gfx] [PATCH 5/8] drm/i915: Don't call intel_dp_set_signal_levels() on link train reset X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Instead of calling intel_dp_set_signal_levels(), which writes the desired signal levels mask to a variable, just call the new function intel_dp_update_signal_levels(). The effect should be the same, except for an extra register write, but this creates a better split between the generic link training logic and the i915 specific part. --- drivers/gpu/drm/i915/intel_dp.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index a51ae48..d5c1b0a 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -3638,16 +3638,6 @@ intel_dp_set_link_train(struct intel_dp *intel_dp, return ret == len; } -static bool -intel_dp_reset_link_train(struct intel_dp *intel_dp, - uint8_t dp_train_pat) -{ - if (!intel_dp->train_set_valid) - memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set)); - intel_dp_set_signal_levels(intel_dp, &intel_dp->DP); - return intel_dp_set_link_train(intel_dp, dp_train_pat); -} - static void intel_dp_update_signal_levels(struct intel_dp *intel_dp) { @@ -3662,6 +3652,16 @@ intel_dp_update_signal_levels(struct intel_dp *intel_dp) } static bool +intel_dp_reset_link_train(struct intel_dp *intel_dp, + uint8_t dp_train_pat) +{ + if (!intel_dp->train_set_valid) + memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set)); + intel_dp_update_signal_levels(intel_dp); + return intel_dp_set_link_train(intel_dp, dp_train_pat); +} + +static bool intel_dp_update_link_train(struct intel_dp *intel_dp) { int ret;