From patchwork Mon Sep 14 18:20:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Zanoni, Paulo R" X-Patchwork-Id: 7177851 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 9C617BEEC1 for ; Mon, 14 Sep 2015 18:20:26 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A644E2062D for ; Mon, 14 Sep 2015 18:20:25 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id B91AE204AE for ; Mon, 14 Sep 2015 18:20:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 108876E250; Mon, 14 Sep 2015 11:20:24 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 4C9AD6E250 for ; Mon, 14 Sep 2015 11:20:23 -0700 (PDT) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 14 Sep 2015 11:20:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,530,1437462000"; d="scan'208";a="768857563" Received: from sschen-mobl3.amr.corp.intel.com (HELO panetone.amr.corp.intel.com) ([10.252.128.173]) by orsmga001.jf.intel.com with ESMTP; 14 Sep 2015 11:20:22 -0700 From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Mon, 14 Sep 2015 15:20:02 -0300 Message-Id: <1442254803-20043-8-git-send-email-paulo.r.zanoni@intel.com> X-Mailer: git-send-email 2.5.1 In-Reply-To: <1442254803-20043-1-git-send-email-paulo.r.zanoni@intel.com> References: <1442254803-20043-1-git-send-email-paulo.r.zanoni@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 8/9] drm/i915: reject invalid formats for FBC X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This commit is essentially a rewrite of "drm/i915: Check pixel format for fbc" from Ville Syrjälä. The idea is the same, but the code is different due to all the changes that happened since his original patch. So any bugs are due to my bad rewrite. v2: - Drop the alpha formats (Ville). Testcases: igt/kms_frontbuffer_tracking/*fbc*-${format_name}-draw-* Credits-to: Ville Syrjälä Signed-off-by: Paulo Zanoni Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_fbc.c | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 33 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index d22120f..4e44352 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -950,6 +950,7 @@ struct i915_fbc { FBC_IN_DBG_MASTER, /* kernel debugger is active */ FBC_BAD_STRIDE, /* stride is not supported */ FBC_PIXEL_RATE, /* pixel rate is too big */ + FBC_PIXEL_FORMAT /* pixel format is invalid */ } no_fbc_reason; bool (*fbc_enabled)(struct drm_i915_private *dev_priv); diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c index 56cf110..a3a97f2 100644 --- a/drivers/gpu/drm/i915/intel_fbc.c +++ b/drivers/gpu/drm/i915/intel_fbc.c @@ -484,6 +484,8 @@ const char *intel_no_fbc_reason_str(enum no_fbc_reason reason) return "framebuffer stride not supported"; case FBC_PIXEL_RATE: return "pixel rate is too big"; + case FBC_PIXEL_FORMAT: + return "pixel format is invalid"; default: MISSING_CASE(reason); return "unknown reason"; @@ -709,6 +711,31 @@ static bool stride_is_valid(struct drm_i915_private *dev_priv, return true; } +static bool pixel_format_is_valid(struct drm_framebuffer *fb) +{ + struct drm_device *dev = fb->dev; + struct drm_i915_private *dev_priv = dev->dev_private; + + /* Primary planes don't support alpha, so the "A" formats and "X" + * formats are one and the same. */ + switch (fb->pixel_format) { + case DRM_FORMAT_XRGB8888: + case DRM_FORMAT_XBGR8888: + return true; + case DRM_FORMAT_XRGB1555: + case DRM_FORMAT_RGB565: + /* 16bpp not supported on gen2 */ + if (IS_GEN2(dev)) + return false; + /* WaFbcOnly1to1Ratio:ctg */ + if (IS_G4X(dev_priv)) + return false; + return true; + default: + return false; + } +} + /** * __intel_fbc_update - enable/disable FBC as needed, unlocked * @dev_priv: i915 device instance @@ -824,6 +851,11 @@ static void __intel_fbc_update(struct drm_i915_private *dev_priv) goto out_disable; } + if (!pixel_format_is_valid(fb)) { + set_no_fbc_reason(dev_priv, FBC_PIXEL_FORMAT); + goto out_disable; + } + /* If the kernel debugger is active, always disable compression */ if (in_dbg_master()) { set_no_fbc_reason(dev_priv, FBC_IN_DBG_MASTER);