From patchwork Mon Sep 21 18:11:18 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kumar, Mahesh" X-Patchwork-Id: 7233461 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id BD8FF9F380 for ; Mon, 21 Sep 2015 18:39:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 01AD02074A for ; Mon, 21 Sep 2015 18:39:37 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 15A222075A for ; Mon, 21 Sep 2015 18:39:36 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D229A6E4EB; Mon, 21 Sep 2015 11:39:34 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id A2EF16E4EB for ; Mon, 21 Sep 2015 11:39:33 -0700 (PDT) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP; 21 Sep 2015 11:09:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,568,1437462000"; d="scan'208";a="649385462" Received: from kumarmah-desk.iind.intel.com ([10.223.25.6]) by orsmga003.jf.intel.com with ESMTP; 21 Sep 2015 11:09:24 -0700 From: "Kumar, Mahesh" To: intel-gfx@lists.freedesktop.org Date: Mon, 21 Sep 2015 23:41:18 +0530 Message-Id: <1442859078-28226-1-git-send-email-mahesh1.kumar@intel.com> X-Mailer: git-send-email 1.9.1 Subject: [Intel-gfx] [PATCH] drm/i915/skl+: Fix Watermark calculation for Broxton X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In case of Y-Tiling, "plane_blocks_per_line" calculation is different than X/None-Tiling case. This patch corrects this calculation according to Bspec. plane blocks per line = Plane memory format is Y tile ? ceiling[4 * plane bytes per line / 512]/4 : ceiling[plane bytes per line / 512] As per BSpec Don't increment selected "result_blocks" & "result_lines" in case of BROXTON. Signed-off-by: Kumar, Mahesh Reviewed-by: Matt Roper --- drivers/gpu/drm/i915/intel_pm.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index a1ed920..5cfb5d9 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3247,7 +3247,13 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv, latency); plane_bytes_per_line = p_params->horiz_pixels * bytes_per_pixel; - plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512); + + if (p_params->tiling == I915_FORMAT_MOD_Y_TILED || + p_params->tiling == I915_FORMAT_MOD_Yf_TILED) { + plane_blocks_per_line = DIV_ROUND_UP(4 * plane_bytes_per_line, 512); + plane_blocks_per_line /= 4; + } else + plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512); if (p_params->tiling == I915_FORMAT_MOD_Y_TILED || p_params->tiling == I915_FORMAT_MOD_Yf_TILED) { @@ -3277,7 +3283,7 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv, res_blocks = selected_result + 1; res_lines = DIV_ROUND_UP(selected_result, plane_blocks_per_line); - if (level >= 1 && level <= 7) { + if (level >= 1 && level <= 7 && !IS_BROXTON(dev_priv->dev)) { if (p_params->tiling == I915_FORMAT_MOD_Y_TILED || p_params->tiling == I915_FORMAT_MOD_Yf_TILED) res_lines += 4;