From patchwork Tue Sep 29 14:39:05 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Bragg X-Patchwork-Id: 7286581 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id AB99BBEEA4 for ; Tue, 29 Sep 2015 14:39:48 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D0A7C20738 for ; Tue, 29 Sep 2015 14:39:47 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id F01C320732 for ; Tue, 29 Sep 2015 14:39:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5163A6E7EA; Tue, 29 Sep 2015 07:39:46 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pa0-f68.google.com (mail-pa0-f68.google.com [209.85.220.68]) by gabe.freedesktop.org (Postfix) with ESMTPS id AD4A76E7EA; Tue, 29 Sep 2015 07:39:44 -0700 (PDT) Received: by pacik9 with SMTP id ik9so970102pac.3; Tue, 29 Sep 2015 07:39:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=s6WUoMYdZy3ikg683rLBR8DjFPlg0P+bzKjjxq9w72g=; b=pcrm++ZHa8+dSr6wymnLnTe9UoycaX2ASjqK2bKahr+ilNuLOOOJqr/m415tB9dyq9 bYhG4pPPQwjD2gjd3hxCPNFd2NH+biMCd597SnrMS8pO0QUJwURGExQe3fW8vxiO+ZsC i9/NjH4rHAu39vFnHEZa3vLW5ZHeoGbe5Wye1cNpxeONGhB+j0Ksc0tshskWRjU7KykB n1B1h7BCsSK9I2WRkJHQ8KHQMVQEf2GEnIbLcptUjCEqHYt7CXoldh1VtpKeH7IHJhQh kP9L8fHSRDMJqFKVEFzi9ZSH8PlRma4SYQCN6XC/y4W9r/RIlZWZAqKlGu+Z1wyBnpsi i7Jg== X-Received: by 10.68.181.130 with SMTP id dw2mr33399285pbc.70.1443537584413; Tue, 29 Sep 2015 07:39:44 -0700 (PDT) Received: from sixbynine.org (host-2-103-31-44.as13285.net. [2.103.31.44]) by smtp.gmail.com with ESMTPSA id i9sm25984066pbq.84.2015.09.29.07.39.41 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 29 Sep 2015 07:39:43 -0700 (PDT) From: Robert Bragg To: intel-gfx@lists.freedesktop.org Date: Tue, 29 Sep 2015 15:39:05 +0100 Message-Id: <1443537549-6905-3-git-send-email-robert@sixbynine.org> X-Mailer: git-send-email 2.5.2 In-Reply-To: <1443537549-6905-1-git-send-email-robert@sixbynine.org> References: <1443537549-6905-1-git-send-email-robert@sixbynine.org> Cc: Mark Rutland , Matt Fleming , David Airlie , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Peter Zijlstra , Sourab Gupta , linux-api@vger.kernel.org, Zheng Yan , Daniel Vetter , Ingo Molnar , Alexander Shishkin Subject: [Intel-gfx] [RFC 2/6] drm/i915: rename OACONTROL GEN7_OACONTROL X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP OACONTROL changes quite a bit for gen8, with some bits split out into a per-context OACTXCONTROL register Signed-off-by: Robert Bragg --- drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++-- drivers/gpu/drm/i915/i915_reg.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c index 237ff68..d769436 100644 --- a/drivers/gpu/drm/i915/i915_cmd_parser.c +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c @@ -439,7 +439,7 @@ static const struct drm_i915_reg_descriptor gen7_render_regs[] = { REG64(CL_PRIMITIVES_COUNT), REG64(PS_INVOCATION_COUNT), REG64(PS_DEPTH_COUNT), - REG32(OACONTROL), /* Only allowed for LRI and SRM. See below. */ + REG32(GEN7_OACONTROL), /* Only allowed for LRI and SRM. See below. */ REG64(MI_PREDICATE_SRC0), REG64(MI_PREDICATE_SRC1), REG32(GEN7_3DPRIM_END_OFFSET), @@ -1020,7 +1020,7 @@ static bool check_cmd(const struct intel_engine_cs *ring, * to the register. Hence, limit OACONTROL writes to * only MI_LOAD_REGISTER_IMM commands. */ - if (reg_addr == OACONTROL) { + if (reg_addr == GEN7_OACONTROL) { if (desc->cmd.value == MI_LOAD_REGISTER_MEM(1)) { DRM_DEBUG_DRIVER("CMD: Rejected LRM to OACONTROL\n"); return false; diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 1fa0554..2e488e8 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -536,7 +536,7 @@ #define GEN7_3DPRIM_START_INSTANCE 0x243C #define GEN7_3DPRIM_BASE_VERTEX 0x2440 -#define OACONTROL 0x2360 +#define GEN7_OACONTROL 0x2360 #define _GEN7_PIPEA_DE_LOAD_SL 0x70068 #define _GEN7_PIPEB_DE_LOAD_SL 0x71068