From patchwork Thu Oct 1 15:21:08 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Gordon X-Patchwork-Id: 7309421 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D9FA89F314 for ; Thu, 1 Oct 2015 15:22:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id EF3BB206B0 for ; Thu, 1 Oct 2015 15:21:59 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id F14F3206A7 for ; Thu, 1 Oct 2015 15:21:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DDB766E0B6; Thu, 1 Oct 2015 08:21:57 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id EC67D6E0B6 for ; Thu, 1 Oct 2015 08:21:56 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP; 01 Oct 2015 08:21:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,618,1437462000"; d="scan'208";a="817180782" Received: from dsgordon-linux2.isw.intel.com ([10.102.226.88]) by fmsmga002.fm.intel.com with ESMTP; 01 Oct 2015 08:21:28 -0700 From: Dave Gordon To: intel-gfx@lists.freedesktop.org Date: Thu, 1 Oct 2015 16:21:08 +0100 Message-Id: <1443712868-36598-2-git-send-email-david.s.gordon@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1443712868-36598-1-git-send-email-david.s.gordon@intel.com> References: <1443712868-36598-1-git-send-email-david.s.gordon@intel.com> Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [RFC 1/1] drm/i915: Add scheduling priority to per-context parameters X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The next use for the i915 get/set per-context parameters ioctl, ahead of the introduction of the forthcoming GPU scheduler. Signed-off-by: Dave Gordon --- drivers/gpu/drm/i915/i915_drv.h | 28 ++++++++++++++++++++++++++++ drivers/gpu/drm/i915/i915_gem_context.c | 17 +++++++++++++++++ include/uapi/drm/i915_drm.h | 1 + 3 files changed, 46 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 279e258..104b711 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -850,6 +850,33 @@ struct i915_ctx_hang_stats { bool banned; }; +/* + * User-settable GFX scheduler priorities are on a scale of 1 (lowest + * priority) to 1023 (highest priority). The special value 0 means + * "let the system decide my priority automatically"; this is the + * default if the user process does not explicitly request a different + * priority. Any process may decrease its scheduling priority, but + * only a sufficiently-privileged process may increase it. However, + * it is always permissible to reset it to "system default", even if + * is currently lower than that. Thus, if the system-assigned default + * were, say, 256, a process could decrease it to 128, and then to 64. + * It could NOT then increase it to 128 again, but COULD request a + * priority of 0 -- which would actually reset it to 256, allowing + * the process to then request 128 again. (This avoids the issue with + * nice(2) priorities, namely that non-super-users can not increase + * scheduling priorities of their own processes, even if they were the + * ones that decreased the priorities in the first place). + */ + +#define i915_SCHED_PRIORITY_DEFAULT 0 +#define i915_SCHED_PRIORITY_MIN 1 +#define i915_SCHED_PRIORITY_MAX 1023 + +struct i915_ctx_sched_info { + /* Scheduling priority */ + unsigned long priority; +}; + /* This must match up with the value previously used for execbuf2.rsvd1. */ #define DEFAULT_CONTEXT_HANDLE 0 @@ -881,6 +908,7 @@ struct intel_context { int flags; struct drm_i915_file_private *file_priv; struct i915_ctx_hang_stats hang_stats; + struct i915_ctx_sched_info sched_info; struct i915_hw_ppgtt *ppgtt; /* Legacy ring buffer submission */ diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index 74aa0c9..2728a0d 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c @@ -901,6 +901,9 @@ int i915_gem_context_getparam_ioctl(struct drm_device *dev, void *data, case I915_CONTEXT_PARAM_NO_ZEROMAP: args->value = ctx->flags & CONTEXT_NO_ZEROMAP; break; + case I915_CONTEXT_PARAM_PRIORITY: + args->value = ctx->sched_info.priority; + break; default: ret = -EINVAL; break; @@ -938,6 +941,7 @@ int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data, else ctx->hang_stats.ban_period_seconds = args->value; break; + case I915_CONTEXT_PARAM_NO_ZEROMAP: if (args->size) { ret = -EINVAL; @@ -946,6 +950,19 @@ int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data, ctx->flags |= args->value ? CONTEXT_NO_ZEROMAP : 0; } break; + + case I915_CONTEXT_PARAM_PRIORITY: + if (args->size) + ret = -EINVAL; + else if (args->value > I915_SCHED_PRIORITY_MAX) + ret = -EINVAL; + else if (args->value > ctx->sched_info.priority && + !capable(CAP_SYS_ADMIN)) + ret = -EPERM; + else + ctx->sched_info.priority = args->value; + break; + default: ret = -EINVAL; break; diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index fd5aa47..a860263 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -1126,6 +1126,7 @@ struct drm_i915_gem_context_param { __u64 param; #define I915_CONTEXT_PARAM_BAN_PERIOD 0x1 #define I915_CONTEXT_PARAM_NO_ZEROMAP 0x2 +#define I915_CONTEXT_PARAM_PRIORITY 0x3 __u64 value; };