| Message ID | 1443791980-34458-2-git-send-email-arun.siluvery@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, Oct 02, 2015 at 02:19:40PM +0100, Arun Siluvery wrote: > Required for WaAllowUMDToModifyHDCChicken1:skl,bxt > > Cc: Mika Kuoppala <mika.kuoppala@intel.com> > Cc: Nick Hoath <nicholas.hoath@intel.com> > Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com> Usual maintainer request: Needs the corresponding mesa patches reviewed before I can pull this in. -Daniel > --- > drivers/gpu/drm/i915/i915_reg.h | 2 ++ > drivers/gpu/drm/i915/intel_ringbuffer.c | 6 ++++++ > 2 files changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 797c74e..dc84072 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -5937,6 +5937,8 @@ enum skl_disp_power_wells { > #define HDC_FORCE_NON_COHERENT (1<<4) > #define HDC_BARRIER_PERFORMANCE_DISABLE (1<<10) > > +#define HDC_CHICKEN1 0x7304 > + > /* GEN9 chicken */ > #define SLICE_ECO_CHICKEN0 0x7308 > #define PIXEL_MASK_CAMMING_DISABLE (1 << 14) > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > index 64b2754..a091e9e 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > @@ -921,6 +921,7 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) > struct drm_device *dev = ring->dev; > struct drm_i915_private *dev_priv = dev->dev_private; > uint32_t tmp; > + int ret; > > /* WaDisablePartialInstShootdown:skl,bxt */ > WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, > @@ -979,6 +980,11 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) > tmp |= HDC_FORCE_CSR_NON_COHERENT_OVR_DISABLE; > WA_SET_BIT_MASKED(HDC_CHICKEN0, tmp); > > + /* WaAllowUMDToModifyHDCChicken1:skl,bxt */ > + ret = wa_ring_whitelist_reg(ring, HDC_CHICKEN1); > + if (ret) > + return ret; > + > /* WaDisableSamplerPowerBypassForSOPingPong:skl,bxt */ > if (IS_SKYLAKE(dev) || > (IS_BROXTON(dev) && INTEL_REVID(dev) <= BXT_REVID_B0)) { > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 797c74e..dc84072 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -5937,6 +5937,8 @@ enum skl_disp_power_wells { #define HDC_FORCE_NON_COHERENT (1<<4) #define HDC_BARRIER_PERFORMANCE_DISABLE (1<<10) +#define HDC_CHICKEN1 0x7304 + /* GEN9 chicken */ #define SLICE_ECO_CHICKEN0 0x7308 #define PIXEL_MASK_CAMMING_DISABLE (1 << 14) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 64b2754..a091e9e 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -921,6 +921,7 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) struct drm_device *dev = ring->dev; struct drm_i915_private *dev_priv = dev->dev_private; uint32_t tmp; + int ret; /* WaDisablePartialInstShootdown:skl,bxt */ WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, @@ -979,6 +980,11 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) tmp |= HDC_FORCE_CSR_NON_COHERENT_OVR_DISABLE; WA_SET_BIT_MASKED(HDC_CHICKEN0, tmp); + /* WaAllowUMDToModifyHDCChicken1:skl,bxt */ + ret = wa_ring_whitelist_reg(ring, HDC_CHICKEN1); + if (ret) + return ret; + /* WaDisableSamplerPowerBypassForSOPingPong:skl,bxt */ if (IS_SKYLAKE(dev) || (IS_BROXTON(dev) && INTEL_REVID(dev) <= BXT_REVID_B0)) {
Required for WaAllowUMDToModifyHDCChicken1:skl,bxt Cc: Mika Kuoppala <mika.kuoppala@intel.com> Cc: Nick Hoath <nicholas.hoath@intel.com> Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/drm/i915/intel_ringbuffer.c | 6 ++++++ 2 files changed, 8 insertions(+)