From patchwork Mon Oct 12 17:25:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Shankar, Uma" X-Patchwork-Id: 7377921 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 91C1DBEEA4 for ; Mon, 12 Oct 2015 16:57:24 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B6F5D208CA for ; Mon, 12 Oct 2015 16:57:23 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id C06A2208BD for ; Mon, 12 Oct 2015 16:57:22 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3E7486E84B; Mon, 12 Oct 2015 09:57:22 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id 37AF76E84B for ; Mon, 12 Oct 2015 09:57:21 -0700 (PDT) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga103.fm.intel.com with ESMTP; 12 Oct 2015 09:56:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,673,1437462000"; d="scan'208";a="662760032" Received: from ubuntu-tc11.iind.intel.com ([10.223.26.30]) by orsmga003.jf.intel.com with ESMTP; 12 Oct 2015 09:56:55 -0700 From: Uma Shankar To: intel-gfx@lists.freedesktop.org Date: Mon, 12 Oct 2015 22:55:02 +0530 Message-Id: <1444670703-644-3-git-send-email-uma.shankar@intel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1444670703-644-1-git-send-email-uma.shankar@intel.com> References: <1444670703-644-1-git-send-email-uma.shankar@intel.com> Cc: shobhit.kumar@intel.com Subject: [Intel-gfx] [BXT DSI timing fixes v1 2/3] drm/i915/bxt: Get pipe timing for BXT DSI X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP For BXT DSI, vtotal, vactive, hactive registers are different. Making changes to intel_crtc_mode_get() and get_pipe_timings(), to read the correct registers for BXT DSI. Signed-off-by: Uma Shankar Signed-off-by: Vandana Kannan Tested-by: Mika Kahola --- drivers/gpu/drm/i915/intel_display.c | 48 +++++++++++++++++++++++++++++++--- 1 file changed, 45 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 75c60b8..2717823 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -7708,6 +7708,7 @@ static void intel_get_pipe_timings(struct intel_crtc *crtc, struct drm_device *dev = crtc->base.dev; struct drm_i915_private *dev_priv = dev->dev_private; enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; + bool is_dsi = intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI); uint32_t tmp; tmp = I915_READ(HTOTAL(cpu_transcoder)); @@ -7736,6 +7737,26 @@ static void intel_get_pipe_timings(struct intel_crtc *crtc, pipe_config->base.adjusted_mode.crtc_vblank_end += 1; } + if (IS_BROXTON(dev) && is_dsi) { + struct intel_encoder *encoder; + + for_each_encoder_on_crtc(dev, &crtc->base, encoder) { + struct intel_dsi *intel_dsi = + enc_to_intel_dsi(&encoder->base); + enum port port; + + for_each_dsi_port(port, intel_dsi->ports) { + pipe_config->base.adjusted_mode.crtc_hdisplay = + I915_READ(BXT_MIPI_TRANS_HACTIVE(port)); + pipe_config->base.adjusted_mode.crtc_vdisplay = + I915_READ(BXT_MIPI_TRANS_VACTIVE(port)); + pipe_config->base.adjusted_mode.crtc_vtotal = + I915_READ(BXT_MIPI_TRANS_VTOTAL(port)); + } + } + + } + tmp = I915_READ(PIPESRC(crtc->pipe)); pipe_config->pipe_src_h = (tmp & 0xffff) + 1; pipe_config->pipe_src_w = ((tmp >> 16) & 0xffff) + 1; @@ -10664,6 +10685,7 @@ struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev, int vtot = I915_READ(VTOTAL(cpu_transcoder)); int vsync = I915_READ(VSYNC(cpu_transcoder)); enum pipe pipe = intel_crtc->pipe; + bool is_dsi = intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DSI); mode = kzalloc(sizeof(*mode), GFP_KERNEL); if (!mode) @@ -10684,15 +10706,35 @@ struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev, i9xx_crtc_clock_get(intel_crtc, &pipe_config); mode->clock = pipe_config.port_clock / pipe_config.pixel_multiplier; - mode->hdisplay = (htot & 0xffff) + 1; mode->htotal = ((htot & 0xffff0000) >> 16) + 1; mode->hsync_start = (hsync & 0xffff) + 1; mode->hsync_end = ((hsync & 0xffff0000) >> 16) + 1; - mode->vdisplay = (vtot & 0xffff) + 1; - mode->vtotal = ((vtot & 0xffff0000) >> 16) + 1; mode->vsync_start = (vsync & 0xffff) + 1; mode->vsync_end = ((vsync & 0xffff0000) >> 16) + 1; + if (IS_BROXTON(dev) && is_dsi) { + struct intel_encoder *encoder; + + for_each_encoder_on_crtc(dev, &intel_crtc->base, encoder) { + struct intel_dsi *intel_dsi = + enc_to_intel_dsi(&encoder->base); + enum port port; + + for_each_dsi_port(port, intel_dsi->ports) { + mode->vtotal = + I915_READ(BXT_MIPI_TRANS_VTOTAL(port)); + mode->hdisplay = + I915_READ(BXT_MIPI_TRANS_HACTIVE(port)); + mode->vdisplay = + I915_READ(BXT_MIPI_TRANS_VACTIVE(port)); + } + } + } else { + mode->vtotal = ((vtot & 0xffff0000) >> 16) + 1; + mode->hdisplay = (htot & 0xffff) + 1; + mode->vdisplay = (vtot & 0xffff) + 1; + } + drm_mode_set_name(mode); return mode;