From patchwork Fri Oct 30 11:30:49 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 7526321 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 2877ABEEA4 for ; Fri, 30 Oct 2015 11:28:57 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5E735207D1 for ; Fri, 30 Oct 2015 11:28:56 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 645072078B for ; Fri, 30 Oct 2015 11:28:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 611DF6E997; Fri, 30 Oct 2015 04:28:54 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 3B6E96E997 for ; Fri, 30 Oct 2015 04:28:51 -0700 (PDT) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP; 30 Oct 2015 04:28:51 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,217,1444719600"; d="scan'208";a="590962317" Received: from sakamble-desktop.iind.intel.com ([10.223.82.56]) by FMSMGA003.fm.intel.com with ESMTP; 30 Oct 2015 04:28:49 -0700 From: Sagar Arun Kamble To: intel-gfx@lists.freedesktop.org Date: Fri, 30 Oct 2015 17:00:49 +0530 Message-Id: <1446204649-18987-1-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1445938734-1584-1-git-send-email-sagar.a.kamble@intel.com> References: <1445938734-1584-1-git-send-email-sagar.a.kamble@intel.com> Subject: [Intel-gfx] [PATCH v2 1/1] drm/i915/gen9: Check BIOS RC6 setup before enabling RC6 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP RC6 setup is shared between BIOS and Driver. BIOS sets up subset of RC6 configuration registers. If those are not setup Driver should not enable RC6. For implementing this, driver can check RC_CTRL0 and RC_CTRL1 values to know if BIOS has enabled HW/SW RC6. This will also enable user to control RC6 using BIOS settings alone. v2: Had placed logic in gen8 function by mistake. Fixed it. Ensuring RPM is not enabled in case BIOS disabled RC6. Change-Id: If89518708e133be6b3c7c6f90869fb66224b7b87 Signed-off-by: Sagar Arun Kamble --- drivers/gpu/drm/i915/intel_pm.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 2c7c9fc..1ec52f2 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -30,6 +30,7 @@ #include "intel_drv.h" #include "../../../platform/x86/intel_ips.h" #include +#include /** * RC6 is a special power stage which allows the GPU to enter an very @@ -4763,6 +4764,20 @@ static void gen9_enable_rc6(struct drm_device *dev) struct intel_engine_cs *ring; uint32_t rc6_mask = 0; int unused; + bool hw_rc6_enabled, sw_rc6_enabled; + struct device *device = &dev->pdev->dev; + + /* Check if BIOS has enabled HW/SW RC6. Only then enable RC6 */ + hw_rc6_enabled = I915_READ(GEN6_RC_CONTROL) & + (GEN6_RC_CTL_RC6_ENABLE | GEN6_RC_CTL_HW_ENABLE); + sw_rc6_enabled = !(I915_READ(GEN6_RC_CONTROL) & GEN6_RC_CTL_HW_ENABLE) + && (I915_READ(GEN6_RC_STATE) & 0x40000); + if (!(hw_rc6_enabled || sw_rc6_enabled)) { + i915.enable_rc6 = 0; + pm_runtime_forbid(device); + DRM_INFO("RC6 disabled by BIOS, disabled runtime PM support\n"); + } + /* 1a: Software RC state - RC0 */ I915_WRITE(GEN6_RC_STATE, 0);