diff mbox

[1/2] drm/i915/bxt: Universal plane pixel format support

Message ID 1446818687-27050-2-git-send-email-vandita.kulkarni@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Kulkarni, Vandita Nov. 6, 2015, 2:04 p.m. UTC 
From: vandita kulkarni <vandita.kulkarni@intel.com>

This patch adds support for RGB formats on sprites
for BXT (as per Bspec) as we have Universal planes
This patch also adds support for AYUV format on
primary and sprites.

Signed-off-by: vandita kulkarni <vandita.kulkarni@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c |    5 +++++
 drivers/gpu/drm/i915/intel_sprite.c  |    4 ++++
 2 files changed, 9 insertions(+)

Comments

Daniel Vetter Nov. 18, 2015, 10:51 a.m. UTC | #1 
On Fri, Nov 06, 2015 at 07:34:46PM +0530, Vandita Kulkarni wrote:
> From: vandita kulkarni <vandita.kulkarni@intel.com>
> 
> This patch adds support for RGB formats on sprites
> for BXT (as per Bspec) as we have Universal planes
> This patch also adds support for AYUV format on
> primary and sprites.
> 
> Signed-off-by: vandita kulkarni <vandita.kulkarni@intel.com>

Needs an igt. Also there's a giant mess going on with all the universal
plane stuff, and we still don't have full CI and I'd really, really
prefer we get to fix that up a bit more before adding even more on top.
-Daniel

> ---
>  drivers/gpu/drm/i915/intel_display.c |    5 +++++
>  drivers/gpu/drm/i915/intel_sprite.c  |    4 ++++
>  2 files changed, 9 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 3f1b545..0e436d5 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -76,6 +76,7 @@ static const uint32_t skl_primary_formats[] = {
>  	DRM_FORMAT_YVYU,
>  	DRM_FORMAT_UYVY,
>  	DRM_FORMAT_VYUY,
> +	DRM_FORMAT_AYUV,
>  };
>  
>  /* Cursor formats */
> @@ -3013,6 +3014,8 @@ u32 skl_plane_ctl_format(uint32_t pixel_format)
>  		return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_UYVY;
>  	case DRM_FORMAT_VYUY:
>  		return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_VYUY;
> +	case DRM_FORMAT_AYUV:
> +		return PLANE_CTL_FORMAT_AYUV;
>  	default:
>  		MISSING_CASE(pixel_format);
>  	}
> @@ -4482,6 +4485,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
>  	case DRM_FORMAT_YVYU:
>  	case DRM_FORMAT_UYVY:
>  	case DRM_FORMAT_VYUY:
> +	case DRM_FORMAT_AYUV:
>  		break;
>  	default:
>  		DRM_DEBUG_KMS("[PLANE:%d] FB:%d unsupported scaling format 0x%x\n",
> @@ -14418,6 +14422,7 @@ static int intel_framebuffer_init(struct drm_device *dev,
>  	case DRM_FORMAT_UYVY:
>  	case DRM_FORMAT_YVYU:
>  	case DRM_FORMAT_VYUY:
> +	case DRM_FORMAT_AYUV:
>  		if (INTEL_INFO(dev)->gen < 5) {
>  			DRM_DEBUG("unsupported pixel format: %s\n",
>  				  drm_get_format_name(mode_cmd->pixel_format));
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index 4276c13..c250a82 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -1029,10 +1029,14 @@ static uint32_t skl_plane_formats[] = {
>  	DRM_FORMAT_ARGB8888,
>  	DRM_FORMAT_XBGR8888,
>  	DRM_FORMAT_XRGB8888,
> +	DRM_FORMAT_XRGB2101010,
> +	DRM_FORMAT_XBGR2101010,
>  	DRM_FORMAT_YUYV,
>  	DRM_FORMAT_YVYU,
>  	DRM_FORMAT_UYVY,
>  	DRM_FORMAT_VYUY,
> +	DRM_FORMAT_AYUV,
> +	DRM_FORMAT_C8,
>  };
>  
>  int
> -- 
> 1.7.9.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3f1b545..0e436d5 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -76,6 +76,7 @@  static const uint32_t skl_primary_formats[] = {
 	DRM_FORMAT_YVYU,
 	DRM_FORMAT_UYVY,
 	DRM_FORMAT_VYUY,
+	DRM_FORMAT_AYUV,
 };
 
 /* Cursor formats */
@@ -3013,6 +3014,8 @@  u32 skl_plane_ctl_format(uint32_t pixel_format)
 		return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_UYVY;
 	case DRM_FORMAT_VYUY:
 		return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_VYUY;
+	case DRM_FORMAT_AYUV:
+		return PLANE_CTL_FORMAT_AYUV;
 	default:
 		MISSING_CASE(pixel_format);
 	}
@@ -4482,6 +4485,7 @@  static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
 	case DRM_FORMAT_YVYU:
 	case DRM_FORMAT_UYVY:
 	case DRM_FORMAT_VYUY:
+	case DRM_FORMAT_AYUV:
 		break;
 	default:
 		DRM_DEBUG_KMS("[PLANE:%d] FB:%d unsupported scaling format 0x%x\n",
@@ -14418,6 +14422,7 @@  static int intel_framebuffer_init(struct drm_device *dev,
 	case DRM_FORMAT_UYVY:
 	case DRM_FORMAT_YVYU:
 	case DRM_FORMAT_VYUY:
+	case DRM_FORMAT_AYUV:
 		if (INTEL_INFO(dev)->gen < 5) {
 			DRM_DEBUG("unsupported pixel format: %s\n",
 				  drm_get_format_name(mode_cmd->pixel_format));
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 4276c13..c250a82 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1029,10 +1029,14 @@  static uint32_t skl_plane_formats[] = {
 	DRM_FORMAT_ARGB8888,
 	DRM_FORMAT_XBGR8888,
 	DRM_FORMAT_XRGB8888,
+	DRM_FORMAT_XRGB2101010,
+	DRM_FORMAT_XBGR2101010,
 	DRM_FORMAT_YUYV,
 	DRM_FORMAT_YVYU,
 	DRM_FORMAT_UYVY,
 	DRM_FORMAT_VYUY,
+	DRM_FORMAT_AYUV,
+	DRM_FORMAT_C8,
 };
 
 int