| Message ID | 1447084107-8521-3-git-send-email-patrik.jakobsson@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On ma, 2015-11-09 at 16:48 +0100, Patrik Jakobsson wrote: > Move call to gen9_set_dc_state_debugmask_memory_up() into > gen9_set_dc_state() to prevent us missing it somewhere. > > Signed-off-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> > --- > drivers/gpu/drm/i915/intel_runtime_pm.c | 35 ++++++++++++++++------- > ---------- > 1 file changed, 17 insertions(+), 18 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c > b/drivers/gpu/drm/i915/intel_runtime_pm.c > index 5a36dd5..4b9ee60 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -395,6 +395,20 @@ static void assert_can_disable_dc9(struct > drm_i915_private *dev_priv) > */ > } > > +static void gen9_set_dc_state_debugmask_memory_up( > + struct drm_i915_private *dev_priv) > +{ > + uint32_t val; > + > + /* The below bit doesn't need to be cleared ever afterwards > */ > + val = I915_READ(DC_STATE_DEBUG); > + if (!(val & DC_STATE_DEBUG_MASK_MEMORY_UP)) { > + val |= DC_STATE_DEBUG_MASK_MEMORY_UP; > + I915_WRITE(DC_STATE_DEBUG, val); > + POSTING_READ(DC_STATE_DEBUG); > + } > +} > + > static void gen9_set_dc_state(struct drm_i915_private *dev_priv, > uint32_t state) > { > uint32_t val; > @@ -408,6 +422,9 @@ static void gen9_set_dc_state(struct > drm_i915_private *dev_priv, uint32_t state) > > WARN_ON_ONCE(state & ~mask); > > + if (state & DC_STATE_EN_UPTO_DC5_DC6_MASK) > + gen9_set_dc_state_debugmask_memory_up(dev_priv); > + > val = I915_READ(DC_STATE_EN); > DRM_DEBUG_KMS("Setting DC state from %02x to %02x\n", val & > mask, state); > val &= ~mask; > @@ -434,20 +451,6 @@ void bxt_disable_dc9(struct drm_i915_private > *dev_priv) > gen9_set_dc_state(dev_priv, DC_STATE_DISABLE); > } > > -static void gen9_set_dc_state_debugmask_memory_up( > - struct drm_i915_private *dev_priv) > -{ > - uint32_t val; > - > - /* The below bit doesn't need to be cleared ever afterwards > */ > - val = I915_READ(DC_STATE_DEBUG); > - if (!(val & DC_STATE_DEBUG_MASK_MEMORY_UP)) { > - val |= DC_STATE_DEBUG_MASK_MEMORY_UP; > - I915_WRITE(DC_STATE_DEBUG, val); > - POSTING_READ(DC_STATE_DEBUG); > - } > -} > - > void assert_csr_loaded(struct drm_i915_private *dev_priv) > { > WARN_ONCE(!I915_READ(CSR_PROGRAM(0)), > @@ -496,8 +499,6 @@ static void gen9_enable_dc5(struct > drm_i915_private *dev_priv) > > DRM_DEBUG_KMS("Enabling DC5\n"); > > - gen9_set_dc_state_debugmask_memory_up(dev_priv); > - > gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC5); > } > > @@ -543,8 +544,6 @@ void skl_enable_dc6(struct drm_i915_private > *dev_priv) > > DRM_DEBUG_KMS("Enabling DC6\n"); > > - gen9_set_dc_state_debugmask_memory_up(dev_priv); > - > gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC6); > > }
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 5a36dd5..4b9ee60 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -395,6 +395,20 @@ static void assert_can_disable_dc9(struct drm_i915_private *dev_priv) */ } +static void gen9_set_dc_state_debugmask_memory_up( + struct drm_i915_private *dev_priv) +{ + uint32_t val; + + /* The below bit doesn't need to be cleared ever afterwards */ + val = I915_READ(DC_STATE_DEBUG); + if (!(val & DC_STATE_DEBUG_MASK_MEMORY_UP)) { + val |= DC_STATE_DEBUG_MASK_MEMORY_UP; + I915_WRITE(DC_STATE_DEBUG, val); + POSTING_READ(DC_STATE_DEBUG); + } +} + static void gen9_set_dc_state(struct drm_i915_private *dev_priv, uint32_t state) { uint32_t val; @@ -408,6 +422,9 @@ static void gen9_set_dc_state(struct drm_i915_private *dev_priv, uint32_t state) WARN_ON_ONCE(state & ~mask); + if (state & DC_STATE_EN_UPTO_DC5_DC6_MASK) + gen9_set_dc_state_debugmask_memory_up(dev_priv); + val = I915_READ(DC_STATE_EN); DRM_DEBUG_KMS("Setting DC state from %02x to %02x\n", val & mask, state); val &= ~mask; @@ -434,20 +451,6 @@ void bxt_disable_dc9(struct drm_i915_private *dev_priv) gen9_set_dc_state(dev_priv, DC_STATE_DISABLE); } -static void gen9_set_dc_state_debugmask_memory_up( - struct drm_i915_private *dev_priv) -{ - uint32_t val; - - /* The below bit doesn't need to be cleared ever afterwards */ - val = I915_READ(DC_STATE_DEBUG); - if (!(val & DC_STATE_DEBUG_MASK_MEMORY_UP)) { - val |= DC_STATE_DEBUG_MASK_MEMORY_UP; - I915_WRITE(DC_STATE_DEBUG, val); - POSTING_READ(DC_STATE_DEBUG); - } -} - void assert_csr_loaded(struct drm_i915_private *dev_priv) { WARN_ONCE(!I915_READ(CSR_PROGRAM(0)), @@ -496,8 +499,6 @@ static void gen9_enable_dc5(struct drm_i915_private *dev_priv) DRM_DEBUG_KMS("Enabling DC5\n"); - gen9_set_dc_state_debugmask_memory_up(dev_priv); - gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC5); } @@ -543,8 +544,6 @@ void skl_enable_dc6(struct drm_i915_private *dev_priv) DRM_DEBUG_KMS("Enabling DC6\n"); - gen9_set_dc_state_debugmask_memory_up(dev_priv); - gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC6); }
Move call to gen9_set_dc_state_debugmask_memory_up() into gen9_set_dc_state() to prevent us missing it somewhere. Signed-off-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com> --- drivers/gpu/drm/i915/intel_runtime_pm.c | 35 ++++++++++++++++----------------- 1 file changed, 17 insertions(+), 18 deletions(-)