From patchwork Fri Nov 20 13:25:42 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kahola X-Patchwork-Id: 7667751 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 65730BF90C for ; Fri, 20 Nov 2015 13:25:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8BA4A203E3 for ; Fri, 20 Nov 2015 13:25:48 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id AC28E203C2 for ; Fri, 20 Nov 2015 13:25:47 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DEAAE89FA0; Fri, 20 Nov 2015 05:25:46 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id E62C689FA0 for ; Fri, 20 Nov 2015 05:25:44 -0800 (PST) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga101.jf.intel.com with ESMTP; 20 Nov 2015 05:25:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,322,1444719600"; d="scan'208";a="604049290" Received: from sorvi.fi.intel.com ([10.237.72.63]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2015 05:25:30 -0800 From: Mika Kahola To: intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2015 15:25:42 +0200 Message-Id: <1448025942-3623-1-git-send-email-mika.kahola@intel.com> X-Mailer: git-send-email 1.9.1 Subject: [Intel-gfx] [PATCH] drm/i915: Make DP fast link training a module parameter X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP There is a bug report https://bugs.freedesktop.org/show_bug.cgi?id=91393 indicating that there are panels that do not support link training starting with non-zero voltage swing and pre-emphasis values. This patch proposes to make this fast link training feature as one module parameter. To take more conservative approach this feature is disabled by default. Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_params.c | 4 ++++ drivers/gpu/drm/i915/intel_dp_link_training.c | 11 ++++++++++- 3 files changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index a47e0f4..dc2d5a0 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2669,6 +2669,7 @@ struct i915_params { bool verbose_state_checks; bool nuclear_pageflip; int edp_vswing; + bool enable_dp_flt; }; extern struct i915_params i915 __read_mostly; diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index 835d609..aea5d47 100644 --- a/drivers/gpu/drm/i915/i915_params.c +++ b/drivers/gpu/drm/i915/i915_params.c @@ -56,6 +56,7 @@ struct i915_params i915 __read_mostly = { .edp_vswing = 0, .enable_guc_submission = false, .guc_log_level = -1, + .enable_dp_flt = false, }; module_param_named(modeset, i915.modeset, int, 0400); @@ -202,3 +203,6 @@ MODULE_PARM_DESC(enable_guc_submission, "Enable GuC submission (default:false)") module_param_named(guc_log_level, i915.guc_log_level, int, 0400); MODULE_PARM_DESC(guc_log_level, "GuC firmware logging level (-1:disabled (default), 0-3:enabled)"); + +module_param_named_unsafe(enable_dp_flt, i915.enable_dp_flt, bool, 0400); +MODULE_PARM_DESC(enable_dp_flt, "Enable DP fast link training (default:false)"); diff --git a/drivers/gpu/drm/i915/intel_dp_link_training.c b/drivers/gpu/drm/i915/intel_dp_link_training.c index 8888793..f8b6d69 100644 --- a/drivers/gpu/drm/i915/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/intel_dp_link_training.c @@ -85,8 +85,17 @@ static bool intel_dp_reset_link_train(struct intel_dp *intel_dp, uint8_t dp_train_pat) { - if (!intel_dp->train_set_valid) + if (i915.enable_dp_flt) { + DRM_DEBUG_KMS("DP flt enabled, train set valid: %s\n", + intel_dp->train_set_valid ? "true" : "false"); + + if (!intel_dp->train_set_valid) + memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set)); + } else { + DRM_DEBUG_KMS("DP flt disabled\n"); memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set)); + } + intel_dp_set_signal_levels(intel_dp); return intel_dp_set_link_train(intel_dp, dp_train_pat); }