From patchwork Tue Dec 8 12:44:44 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Derek Morton X-Patchwork-Id: 7796721 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 033619F39B for ; Tue, 8 Dec 2015 12:45:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E4B6A204E3 for ; Tue, 8 Dec 2015 12:45:26 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id BD92320515 for ; Tue, 8 Dec 2015 12:45:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A51696E6FB; Tue, 8 Dec 2015 04:45:24 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id B29956E6FB for ; Tue, 8 Dec 2015 04:45:23 -0800 (PST) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga101.fm.intel.com with ESMTP; 08 Dec 2015 04:44:55 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,399,1444719600"; d="scan'208";a="836744397" Received: from djmorton-linux2.isw.intel.com ([10.102.226.90]) by orsmga001.jf.intel.com with ESMTP; 08 Dec 2015 04:44:53 -0800 From: Derek Morton To: intel-gfx@lists.freedesktop.org Date: Tue, 8 Dec 2015 12:44:44 +0000 Message-Id: <1449578684-16320-1-git-send-email-derek.j.morton@intel.com> X-Mailer: git-send-email 1.9.1 Cc: thomas.wood@intel.com Subject: [Intel-gfx] [PATCH i-g-t] gem_flink_race/prime_self_import: Improve test reliability X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP gem_flink_race and prime_self_import have subtests which read the number of open gem objects from debugfs to determine if objects have leaked during the test. However the test can fail sporadically if the number of gem objects changes due to other process activity. This patch introduces a change to check the number of gem objects several times to filter out any fluctuations. Signed-off-by: Derek Morton --- tests/gem_flink_race.c | 34 +++++++++++++++++++++++++++++----- tests/prime_self_import.c | 43 +++++++++++++++++++++++++++++++++---------- 2 files changed, 62 insertions(+), 15 deletions(-) diff --git a/tests/gem_flink_race.c b/tests/gem_flink_race.c index b17ef85..0552e12 100644 --- a/tests/gem_flink_race.c +++ b/tests/gem_flink_race.c @@ -44,7 +44,7 @@ IGT_TEST_DESCRIPTION("Check for flink/open vs. gem close races."); * in the flink name and corresponding reference getting leaked. */ -/* We want lockless and I'm to lazy to dig out an atomic libarary. On x86 this +/* We want lockless and I'm to lazy to dig out an atomic library. On x86 this * works, too. */ volatile int pls_die = 0; int fd; @@ -65,6 +65,32 @@ static int get_object_count(void) return ret; } +static int get_stable_obj_count(int driver) +{ + /* The test relies on the system being in the same state before and + after the test so any difference in the object count is a result of + leaks during the test. gem_quiescent_gpu() mostly achieves this but + occasionally obj_count can still change. The loop ensures obj_count + has remained stable over several checks */ + int obj_count, prev_obj_count; + int loop_count = 0; + gem_quiescent_gpu(driver); + prev_obj_count = get_object_count(); + while (loop_count < 4) { + usleep(200000); + gem_quiescent_gpu(driver); + obj_count = get_object_count(); + if (obj_count == prev_obj_count) { + loop_count++; + } else { + igt_debug("loop_count=%d, obj_count=%d, prev_obj_count=%d\n", loop_count, obj_count, prev_obj_count); + loop_count = 0; + prev_obj_count = obj_count; + } + + } + return obj_count; +} static void *thread_fn_flink_name(void *p) { @@ -164,8 +190,7 @@ static void test_flink_close(void) * up the counts */ fake = drm_open_driver(DRIVER_INTEL); - gem_quiescent_gpu(fake); - obj_count = get_object_count(); + obj_count = get_stable_obj_count(fake); num_threads = sysconf(_SC_NPROCESSORS_ONLN); @@ -190,8 +215,7 @@ static void test_flink_close(void) close(fd); - gem_quiescent_gpu(fake); - obj_count = get_object_count() - obj_count; + obj_count = get_stable_obj_count(fake) - obj_count; igt_info("leaked %i objects\n", obj_count); diff --git a/tests/prime_self_import.c b/tests/prime_self_import.c index 91fe231..977c7b2 100644 --- a/tests/prime_self_import.c +++ b/tests/prime_self_import.c @@ -47,7 +47,7 @@ #include "drm.h" IGT_TEST_DESCRIPTION("Check whether prime import/export works on the same" - " device."); + " device... but with different fds."); #define BO_SIZE (16*1024) @@ -157,7 +157,7 @@ static void test_with_one_bo_two_files(void) dma_buf_fd2 = prime_handle_to_fd(fd2, handle_open); handle_import = prime_fd_to_handle(fd2, dma_buf_fd2); - /* dma-buf selfimporting an flink bo should give the same handle */ + /* dma-buf self importing an flink bo should give the same handle */ igt_assert_eq_u32(handle_import, handle_open); close(fd1); @@ -226,6 +226,33 @@ static int get_object_count(void) return ret; } +static int get_stable_obj_count(int driver) +{ + /* The test relies on the system being in the same state before and + after the test so any difference in the object count is a result of + leaks during the test. gem_quiescent_gpu() mostly achieves this but + occasionally obj_count can still change. The loop ensures obj_count + has remained stable over several checks */ + int obj_count, prev_obj_count; + int loop_count = 0; + gem_quiescent_gpu(driver); + prev_obj_count = get_object_count(); + while (loop_count < 4) { + usleep(200000); + gem_quiescent_gpu(driver); + obj_count = get_object_count(); + if (obj_count == prev_obj_count) { + loop_count++; + } else { + igt_debug("loop_count=%d, obj_count=%d, prev_obj_count=%d\n", loop_count, obj_count, prev_obj_count); + loop_count = 0; + prev_obj_count = obj_count; + } + + } + return obj_count; +} + static void *thread_fn_reimport_vs_close(void *p) { struct drm_gem_close close_bo; @@ -258,8 +285,7 @@ static void test_reimport_close_race(void) * up the counts */ fake = drm_open_driver(DRIVER_INTEL); - gem_quiescent_gpu(fake); - obj_count = get_object_count(); + obj_count = get_stable_obj_count(fake); num_threads = sysconf(_SC_NPROCESSORS_ONLN); @@ -290,8 +316,7 @@ static void test_reimport_close_race(void) close(fds[0]); close(fds[1]); - gem_quiescent_gpu(fake); - obj_count = get_object_count() - obj_count; + obj_count = get_stable_obj_count(fake) - obj_count; igt_info("leaked %i objects\n", obj_count); @@ -350,8 +375,7 @@ static void test_export_close_race(void) * up the counts */ fake = drm_open_driver(DRIVER_INTEL); - gem_quiescent_gpu(fake); - obj_count = get_object_count(); + obj_count = get_stable_obj_count(fake); fd = drm_open_driver(DRIVER_INTEL); @@ -373,8 +397,7 @@ static void test_export_close_race(void) close(fd); - gem_quiescent_gpu(fake); - obj_count = get_object_count() - obj_count; + obj_count = get_stable_obj_count(fake) - obj_count; igt_info("leaked %i objects\n", obj_count);