From patchwork Thu Dec 17 12:46:03 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kahola X-Patchwork-Id: 7872921 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 15A129F1C2 for ; Thu, 17 Dec 2015 12:45:27 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 174E32035E for ; Thu, 17 Dec 2015 12:45:26 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 21F0220172 for ; Thu, 17 Dec 2015 12:45:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6E4FA6E1D4; Thu, 17 Dec 2015 04:45:24 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id DE2A86E1D4 for ; Thu, 17 Dec 2015 04:45:22 -0800 (PST) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga102.jf.intel.com with ESMTP; 17 Dec 2015 04:45:22 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,441,1444719600"; d="scan'208";a="862921466" Received: from sorvi.fi.intel.com ([10.237.72.63]) by fmsmga001.fm.intel.com with ESMTP; 17 Dec 2015 04:45:22 -0800 From: Mika Kahola To: intel-gfx@lists.freedesktop.org Date: Thu, 17 Dec 2015 14:46:03 +0200 Message-Id: <1450356363-32315-1-git-send-email-mika.kahola@intel.com> X-Mailer: git-send-email 1.9.1 Subject: [Intel-gfx] [PATCH v4] drm/i915: Disable fast link training if DP config changes X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Disable DP fast link training if DP link configuration changes. If one of the DP link parameters i.e. link bandwidth, lane count, rate selection, port clock or bpp changes the link training does no longer apply the previously computed voltage swing and pre-emphasis values. Instead, the link training is started with zero values. v4: Parameter and debug message naming improvements. Fix for link parameter check (Ville) v3: Remove cached old link parameters. Instead, disable fast link training feature when link parameters are set (Ville) v2: Readout DPCD register to check if no aux handshaking is required in link training (Ander) Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_dp.c | 8 +++++++- drivers/gpu/drm/i915/intel_dp_link_training.c | 17 +++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 1 + 3 files changed, 25 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 31ba241..82504f0 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1677,6 +1677,12 @@ found: void intel_dp_set_link_params(struct intel_dp *intel_dp, const struct intel_crtc_state *pipe_config) { + if (intel_dp->link_rate != pipe_config->port_clock || + intel_dp->lane_count != pipe_config->lane_count) { + intel_dp->train_set_valid = false; + DRM_DEBUG_KMS("setting train set valid as false\n"); + } + intel_dp->link_rate = pipe_config->port_clock; intel_dp->lane_count = pipe_config->lane_count; } @@ -3849,7 +3855,7 @@ intel_dp_link_down(struct intel_dp *intel_dp) intel_dp->DP = DP; } -static bool +bool intel_dp_get_dpcd(struct intel_dp *intel_dp) { struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); diff --git a/drivers/gpu/drm/i915/intel_dp_link_training.c b/drivers/gpu/drm/i915/intel_dp_link_training.c index 8888793..e46bad6 100644 --- a/drivers/gpu/drm/i915/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/intel_dp_link_training.c @@ -85,6 +85,23 @@ static bool intel_dp_reset_link_train(struct intel_dp *intel_dp, uint8_t dp_train_pat) { + bool has_dpcd; + bool no_aux_handshake = false; + + has_dpcd = intel_dp_get_dpcd(intel_dp); + + if (has_dpcd) { + if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) { + no_aux_handshake = (intel_dp->dpcd[DP_MAX_DOWNSPREAD] & + DP_NO_AUX_HANDSHAKE_LINK_TRAINING); + } + } + + intel_dp->train_set_valid &= no_aux_handshake; + + DRM_DEBUG_KMS("link training optimization: %s\n", + intel_dp->train_set_valid ? "true" : "false"); + if (!intel_dp->train_set_valid) memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set)); intel_dp_set_signal_levels(intel_dp); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 798463e..94041fd 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1239,6 +1239,7 @@ int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc); bool intel_dp_compute_config(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config); bool intel_dp_is_edp(struct drm_device *dev, enum port port); +bool intel_dp_get_dpcd(struct intel_dp *intel_dp); enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd); void intel_edp_backlight_on(struct intel_dp *intel_dp);