Message ID | 1452679593-3922-8-git-send-email-arun.siluvery@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On 13/01/2016 10:06, Arun Siluvery wrote: > Per context preemption granularity control is only available from SKL:E0+ > > Cc: Dave Gordon <david.s.gordon@intel.com> > Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com> > --- > drivers/gpu/drm/i915/i915_reg.h | 3 +++ > drivers/gpu/drm/i915/intel_ringbuffer.c | 10 ++++++++++ > 2 files changed, 13 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index eabd2af..97774a3 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -5995,6 +5995,9 @@ enum skl_disp_power_wells { > #define SKL_DFSM_CDCLK_LIMIT_450 (2 << 23) > #define SKL_DFSM_CDCLK_LIMIT_337_5 (3 << 23) > > +#define GEN7_FF_SLICE_CS_CHICKEN1 _MMIO(0x20E0) 0x20e0? > +#define GEN9_FFSC_PERCTX_PREEMPT_CTRL (1<<14) > + > #define FF_SLICE_CS_CHICKEN2 _MMIO(0x20e4) > #define GEN9_TSG_BARRIER_ACK_DISABLE (1<<8) > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > index b8dbd2c..5a2ad10 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > @@ -1045,6 +1045,16 @@ static int skl_init_workarounds(struct intel_engine_cs *ring) > if (ret) > return ret; > > + /* > + * Actual WA is to disable percontext preemption granularity control > + * until D0 which is the default case so this is equivalent to > + * !WaDisablePerCtxtPreemptionGranularityControl:skl > + */ > + if (IS_SKL_REVID(dev, SKL_REVID_E0, REVID_FOREVER)) { > + I915_WRITE(GEN7_FF_SLICE_CS_CHICKEN1, > + _MASKED_BIT_ENABLE(GEN9_FFSC_PERCTX_PREEMPT_CTRL)); > + } > + > if (IS_SKL_REVID(dev, 0, SKL_REVID_D0)) { > /* WaDisableChickenBitTSGBarrierAckForFFSliceCS:skl */ > I915_WRITE(FF_SLICE_CS_CHICKEN2, >
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index eabd2af..97774a3 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -5995,6 +5995,9 @@ enum skl_disp_power_wells { #define SKL_DFSM_CDCLK_LIMIT_450 (2 << 23) #define SKL_DFSM_CDCLK_LIMIT_337_5 (3 << 23) +#define GEN7_FF_SLICE_CS_CHICKEN1 _MMIO(0x20E0) +#define GEN9_FFSC_PERCTX_PREEMPT_CTRL (1<<14) + #define FF_SLICE_CS_CHICKEN2 _MMIO(0x20e4) #define GEN9_TSG_BARRIER_ACK_DISABLE (1<<8) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index b8dbd2c..5a2ad10 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -1045,6 +1045,16 @@ static int skl_init_workarounds(struct intel_engine_cs *ring) if (ret) return ret; + /* + * Actual WA is to disable percontext preemption granularity control + * until D0 which is the default case so this is equivalent to + * !WaDisablePerCtxtPreemptionGranularityControl:skl + */ + if (IS_SKL_REVID(dev, SKL_REVID_E0, REVID_FOREVER)) { + I915_WRITE(GEN7_FF_SLICE_CS_CHICKEN1, + _MASKED_BIT_ENABLE(GEN9_FFSC_PERCTX_PREEMPT_CTRL)); + } + if (IS_SKL_REVID(dev, 0, SKL_REVID_D0)) { /* WaDisableChickenBitTSGBarrierAckForFFSliceCS:skl */ I915_WRITE(FF_SLICE_CS_CHICKEN2,
Per context preemption granularity control is only available from SKL:E0+ Cc: Dave Gordon <david.s.gordon@intel.com> Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 3 +++ drivers/gpu/drm/i915/intel_ringbuffer.c | 10 ++++++++++ 2 files changed, 13 insertions(+)