From patchwork Wed Jan 13 17:28:32 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: arun.siluvery@linux.intel.com X-Patchwork-Id: 8027461 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 2C342BEEE5 for ; Wed, 13 Jan 2016 17:29:14 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 458F52053B for ; Wed, 13 Jan 2016 17:29:13 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 78B192041E for ; Wed, 13 Jan 2016 17:29:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C85B67A078; Wed, 13 Jan 2016 09:29:11 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 417AD7A083 for ; Wed, 13 Jan 2016 09:29:07 -0800 (PST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP; 13 Jan 2016 09:29:07 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,290,1449561600"; d="scan'208";a="892498526" Received: from asiluver-linux.isw.intel.com ([10.102.226.117]) by fmsmga002.fm.intel.com with ESMTP; 13 Jan 2016 09:29:05 -0800 From: Arun Siluvery To: intel-gfx@lists.freedesktop.org Date: Wed, 13 Jan 2016 17:28:32 +0000 Message-Id: <1452706112-8617-21-git-send-email-arun.siluvery@linux.intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1452706112-8617-1-git-send-email-arun.siluvery@linux.intel.com> References: <1452706112-8617-1-git-send-email-arun.siluvery@linux.intel.com> Cc: Tomas Elf Subject: [Intel-gfx] [PATCH 20/20] drm/i915: Enable TDR / per-engine hang recovery X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Tomas Elf This is the final enablement patch for per-engine hang recovery. It sets up per-engine hang recovery to be used per default in favour of full GPU reset. Legacy full GPU reset will no longer be the preferred mode of hang recovery and will only be used as a fall-back in case of frequent hangs on individual engines or in the case of engine hang recovery failures. Signed-off-by: Tomas Elf --- drivers/gpu/drm/i915/i915_params.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index 5cf9c11..c098a5a 100644 --- a/drivers/gpu/drm/i915/i915_params.c +++ b/drivers/gpu/drm/i915/i915_params.c @@ -37,7 +37,7 @@ struct i915_params i915 __read_mostly = { .enable_fbc = -1, .enable_execlists = -1, .enable_hangcheck = true, - .enable_engine_reset = false, + .enable_engine_reset = true, .gpu_reset_promotion_time = 10, .enable_ppgtt = -1, .enable_psr = 0, @@ -123,7 +123,7 @@ MODULE_PARM_DESC(enable_engine_reset, "Enable GPU engine hang recovery mode. Used as a soft, low-impact form " "of hang recovery that targets individual GPU engines rather than the " "entire GPU" - "(default: false)"); + "(default: true)"); module_param_named(gpu_reset_promotion_time, i915.gpu_reset_promotion_time, int, 0644);