From patchwork Thu Jan 28 10:21:50 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Wang, Zhi A" X-Patchwork-Id: 8148671 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id BF509BEEED for ; Thu, 28 Jan 2016 10:25:15 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A1CD520364 for ; Thu, 28 Jan 2016 10:25:14 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 310DB20320 for ; Thu, 28 Jan 2016 10:25:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E02EC6E802; Thu, 28 Jan 2016 02:25:11 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id E882B6E802 for ; Thu, 28 Jan 2016 02:25:04 -0800 (PST) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga101.fm.intel.com with ESMTP; 28 Jan 2016 02:25:02 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,358,1449561600"; d="scan'208";a="870588928" Received: from dev-inno.bj.intel.com ([10.238.135.69]) by orsmga001.jf.intel.com with ESMTP; 28 Jan 2016 02:24:58 -0800 From: Zhi Wang To: intel-gfx@lists.freedesktop.org, igvt-g@lists.01.org Date: Thu, 28 Jan 2016 18:21:50 +0800 Message-Id: <1453976511-27322-29-git-send-email-zhi.a.wang@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1453976511-27322-1-git-send-email-zhi.a.wang@intel.com> References: <1453976511-27322-1-git-send-email-zhi.a.wang@intel.com> Cc: daniel.vetter@ffwll.ch, david.j.cowperthwaite@intel.com Subject: [Intel-gfx] [RFC 28/29] drm/i915: gvt: vGPU context switch X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP As different VM may configure different render MMIOs when executing workload, to schedule workloads between different VM, the render MMIOs have to be switched. Signed-off-by: Zhi Wang --- drivers/gpu/drm/i915/gvt/Makefile | 2 +- drivers/gpu/drm/i915/gvt/debug.h | 3 + drivers/gpu/drm/i915/gvt/gvt.h | 1 + drivers/gpu/drm/i915/gvt/render.c | 104 +++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/gvt/render.h | 31 +++++++++++ drivers/gpu/drm/i915/gvt/scheduler.c | 2 + 6 files changed, 142 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/i915/gvt/render.c create mode 100644 drivers/gpu/drm/i915/gvt/render.h diff --git a/drivers/gpu/drm/i915/gvt/Makefile b/drivers/gpu/drm/i915/gvt/Makefile index dcaf715..ccb0d32 100644 --- a/drivers/gpu/drm/i915/gvt/Makefile +++ b/drivers/gpu/drm/i915/gvt/Makefile @@ -1,7 +1,7 @@ GVT_SOURCE := gvt.o params.o aperture_gm.o mmio.o handlers.o instance.o \ trace_points.o interrupt.o gtt.o cfg_space.o opregion.o utility.o \ fb_decoder.o display.o edid.o control.o execlist.o scheduler.o \ - sched_policy.o + sched_policy.o render.o ccflags-y += -I$(src) -I$(src)/.. -Wall -Werror -Wno-unused-function i915_gvt-y := $(GVT_SOURCE) diff --git a/drivers/gpu/drm/i915/gvt/debug.h b/drivers/gpu/drm/i915/gvt/debug.h index c4c03ac..953ba08 100644 --- a/drivers/gpu/drm/i915/gvt/debug.h +++ b/drivers/gpu/drm/i915/gvt/debug.h @@ -87,6 +87,9 @@ enum { #define gvt_dbg_irq(fmt, args...) \ gvt_dbg(GVT_DBG_IRQ, fmt, ##args) +#define gvt_dbg_render(fmt, args...) \ + gvt_dbg(GVT_DBG_RENDER, fmt, ##args) + #define gvt_dbg_el(fmt, args...) \ gvt_dbg(GVT_DBG_EL, fmt, ##args) diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h index 5788bb7..d7ff61e 100644 --- a/drivers/gpu/drm/i915/gvt/gvt.h +++ b/drivers/gpu/drm/i915/gvt/gvt.h @@ -45,6 +45,7 @@ #include "execlist.h" #include "scheduler.h" #include "sched_policy.h" +#include "render.h" #define GVT_MAX_VGPU 8 diff --git a/drivers/gpu/drm/i915/gvt/render.c b/drivers/gpu/drm/i915/gvt/render.c new file mode 100644 index 0000000..2552c77 --- /dev/null +++ b/drivers/gpu/drm/i915/gvt/render.c @@ -0,0 +1,104 @@ +/* + * Copyright(c) 2011-2016 Intel Corporation. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#include "gvt.h" + +struct render_mmio { + int ring_id; + u32 reg; + u32 value; + u32 mask; +}; + +static struct render_mmio gen8_render_mmio_list[] = { + {RCS, 0x229c, 0xffff}, + {RCS, 0x2248, 0x0}, + {RCS, 0x2098, 0x0}, + {RCS, 0x20c0, 0xffff}, + {RCS, 0x24d0, 0}, + {RCS, 0x24d4, 0}, + {RCS, 0x24d8, 0}, + {RCS, 0x24dc, 0}, + {RCS, 0x7004, 0xffff}, + {RCS, 0x7008, 0xffff}, + {RCS, 0x7000, 0xffff}, + {RCS, 0x7010, 0xffff}, + {RCS, 0x7300, 0xffff}, + {RCS, 0x83a4, 0xffff}, + + {BCS, GVT_RING_MODE(BLT_RING_BASE), 0xffff}, + {BCS, _RING_MI_MODE(BLT_RING_BASE), 0xffff}, + {BCS, _RING_INSTPM(BLT_RING_BASE), 0xffff}, + {BCS, _RING_HWSTAM(BLT_RING_BASE), 0xffff}, + {BCS, 0x22028, 0x0}, +}; + +void gvt_load_render_mmio(struct vgt_device *vgt, int ring_id) +{ + u32 v; + int i; + + for (i = 0; i < ARRAY_SIZE(gen8_render_mmio_list); i++) { + struct render_mmio *mmio = gen8_render_mmio_list + i; + if (mmio->ring_id != ring_id) + continue; + + mmio->value = gvt_mmio_read(vgt->pdev, mmio->reg); + if (mmio->mask) + v = __vreg(vgt, mmio->reg) | (mmio->mask << 16); + else + v = __vreg(vgt, mmio->reg); + + gvt_mmio_write(vgt->pdev, mmio->reg, v); + gvt_mmio_posting_read(vgt->pdev, mmio->reg); + + gvt_dbg_render("reg %x value old %x new %x", + mmio->reg, mmio->value, v); + } +} + +void gvt_restore_render_mmio(struct vgt_device *vgt, int ring_id) +{ + u32 v; + int i; + + for (i = 0; i < ARRAY_SIZE(gen8_render_mmio_list); i++) { + struct render_mmio *mmio = gen8_render_mmio_list + i; + if (mmio->ring_id != ring_id) + continue; + + __vreg(vgt, mmio->reg) = gvt_mmio_read(vgt->pdev, mmio->reg); + + if (mmio->mask) { + __vreg(vgt, mmio->reg) &= ~(mmio->mask << 16); + v = mmio->value | (mmio->mask << 16); + } else + v = mmio->value; + + gvt_mmio_write(vgt->pdev, mmio->reg, v); + gvt_mmio_posting_read(vgt->pdev, mmio->reg); + + gvt_dbg_render("reg %x value old %x new %x", + mmio->reg, mmio->value, v); + } +} diff --git a/drivers/gpu/drm/i915/gvt/render.h b/drivers/gpu/drm/i915/gvt/render.h new file mode 100644 index 0000000..8058113 --- /dev/null +++ b/drivers/gpu/drm/i915/gvt/render.h @@ -0,0 +1,31 @@ +/* + * Copyright(c) 2011-2016 Intel Corporation. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#ifndef __GVT_RENDER_H__ +#define __GVT_RENDER_H__ + +void gvt_load_render_mmio(struct vgt_device *vgt, int ring_id); + +void gvt_restore_render_mmio(struct vgt_device *vgt, int ring_id); + +#endif diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c b/drivers/gpu/drm/i915/gvt/scheduler.c index d8d2e23..d38aeb1 100644 --- a/drivers/gpu/drm/i915/gvt/scheduler.c +++ b/drivers/gpu/drm/i915/gvt/scheduler.c @@ -106,6 +106,7 @@ static void shadow_context_schedule_in(void *data) { struct gvt_workload *workload = (struct gvt_workload *)data; + gvt_load_render_mmio(workload->vgt, workload->ring_id); atomic_set(&workload->shadow_ctx_active, 1); wake_up(&workload->shadow_ctx_status_wq); } @@ -114,6 +115,7 @@ static void shadow_context_schedule_out(void *data) { struct gvt_workload *workload = (struct gvt_workload *)data; + gvt_restore_render_mmio(workload->vgt, workload->ring_id); atomic_set(&workload->shadow_ctx_active, 0); wake_up(&workload->shadow_ctx_status_wq); }