From patchwork Wed Feb 3 18:39:07 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Bragg X-Patchwork-Id: 8206921 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id AC318BEEED for ; Wed, 3 Feb 2016 18:39:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DE374202F8 for ; Wed, 3 Feb 2016 18:39:27 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id CDDB620303 for ; Wed, 3 Feb 2016 18:39:23 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3A72F6E7E7; Wed, 3 Feb 2016 10:39:22 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-f68.google.com (mail-wm0-f68.google.com [74.125.82.68]) by gabe.freedesktop.org (Postfix) with ESMTPS id 75AE46E7E6; Wed, 3 Feb 2016 10:39:19 -0800 (PST) Received: by mail-wm0-f68.google.com with SMTP id 128so8648660wmz.3; Wed, 03 Feb 2016 10:39:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=2Zx+T3ty9tXfXV3xCSFFcXvy00GuZ010+c7st9VNoKc=; b=iXgxZENxsENSRPhIlhgutpqG6zmEolFVA0ywbiNzFB4QuEzSvfT4DNH5ZHF52DANm+ Kxli2CYT0FRvSMbFhYGqtGYEgf4+v2b0+htkkt2QDWEZeWU9GLlsZowxhAlwQVUllnjS oS0sgjvLkSzfLnKPMSynpJ8Vwuuaw4M/PRYnwVSet1Z/eh9hXqhpZ87H3h2rgk4ZH3gt Qtk9Ma8lWbiZl4Y+6iO3rkGa7pQ4WcPvY36q0KlNvxiDKUfWpUJuDIh8/V7vUjzy+lrH zA9k80C9euXvn/7XaCGiPlOzkMaI2r6bTz3Y59/EgHLA+gL4Q/lcpqNtdc26nj+myFin 39mQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=2Zx+T3ty9tXfXV3xCSFFcXvy00GuZ010+c7st9VNoKc=; b=LHXTJ1yvt/bwHd/EQQRVVPzE+4b/8LiLy4ZH2ZqutuZV50Cbf1eP/3oqG8nMrLzpOZ C6IpkOCjMoyLDi9J8O9ABM9yeRnd45wRbgZXwGccDVBv6ClZ9XK0OBdDUQs+44PxSqVS ijePlNCL0S0PLJpWBHoUsCzIVrDkcA0vbuQcN7PZhZo3Fp100EVGEg9/OkpD1bLev3tL ZNj7+233/5HHLDOu4baFgr4FByfx77zudib3co7+33IeTaYUIxIy/LVew3zzL2Xc1zx8 ivPhoDu7gB+VkFRwFYcYiLXvfKG8dOwKg22FQT1PTSJ+Y7qS9v4U9O254SfRMHvIEC1W 5UPQ== X-Gm-Message-State: AG10YORs4kdinffH7j+o8OXH5GeTwnr+UBQupzuuWJV6nJGsWMPCEb8iJw+5t43jy+stuQ== X-Received: by 10.194.201.134 with SMTP id ka6mr3569429wjc.116.1454524758220; Wed, 03 Feb 2016 10:39:18 -0800 (PST) Received: from sixbynine.org ([83.217.123.106]) by smtp.gmail.com with ESMTPSA id kw1sm7746516wjb.12.2016.02.03.10.39.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 03 Feb 2016 10:39:17 -0800 (PST) From: Robert Bragg To: intel-gfx@lists.freedesktop.org Date: Wed, 3 Feb 2016 18:39:07 +0000 Message-Id: <1454524753-13218-3-git-send-email-robert@sixbynine.org> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1454524753-13218-1-git-send-email-robert@sixbynine.org> References: <1454524753-13218-1-git-send-email-robert@sixbynine.org> Cc: David Airlie , dri-devel@lists.freedesktop.org, Sourab Gupta , Daniel Vetter Subject: [Intel-gfx] [PATCH 2/8] drm/i915: rename OACONTROL GEN7_OACONTROL X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP OACONTROL changes quite a bit for gen8, with some bits split out into a per-context OACTXCONTROL register. Rename now before add more gen7 OA registers Signed-off-by: Robert Bragg --- drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++-- drivers/gpu/drm/i915/i915_reg.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c index 814d894..920b75f 100644 --- a/drivers/gpu/drm/i915/i915_cmd_parser.c +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c @@ -444,7 +444,7 @@ static const struct drm_i915_reg_descriptor gen7_render_regs[] = { REG64(CL_PRIMITIVES_COUNT), REG64(PS_INVOCATION_COUNT), REG64(PS_DEPTH_COUNT), - REG32(OACONTROL), /* Only allowed for LRI and SRM. See below. */ + REG32(GEN7_OACONTROL), /* Only allowed for LRI and SRM. See below. */ REG64(MI_PREDICATE_SRC0), REG64(MI_PREDICATE_SRC1), REG32(GEN7_3DPRIM_END_OFFSET), @@ -1028,7 +1028,7 @@ static bool check_cmd(const struct intel_engine_cs *ring, * to the register. Hence, limit OACONTROL writes to * only MI_LOAD_REGISTER_IMM commands. */ - if (reg_addr == i915_mmio_reg_offset(OACONTROL)) { + if (reg_addr == i915_mmio_reg_offset(GEN7_OACONTROL)) { if (desc->cmd.value == MI_LOAD_REGISTER_MEM) { DRM_DEBUG_DRIVER("CMD: Rejected LRM to OACONTROL\n"); return false; diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index c0bd691..119401c 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -586,7 +586,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) #define GEN7_GPGPU_DISPATCHDIMY _MMIO(0x2504) #define GEN7_GPGPU_DISPATCHDIMZ _MMIO(0x2508) -#define OACONTROL _MMIO(0x2360) +#define GEN7_OACONTROL _MMIO(0x2360) #define _GEN7_PIPEA_DE_LOAD_SL 0x70068 #define _GEN7_PIPEB_DE_LOAD_SL 0x71068