From patchwork Fri Feb 12 09:38:54 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Derek Morton X-Patchwork-Id: 8289491 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7176FBEEE5 for ; Fri, 12 Feb 2016 09:39:47 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8BB58203B7 for ; Fri, 12 Feb 2016 09:39:46 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 9E7BA203B5 for ; Fri, 12 Feb 2016 09:39:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1CF657A14A; Fri, 12 Feb 2016 01:39:45 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 1727E7A149 for ; Fri, 12 Feb 2016 01:39:44 -0800 (PST) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP; 12 Feb 2016 01:39:26 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,435,1449561600"; d="scan'208";a="651136885" Received: from djmorton-linux2.isw.intel.com ([10.102.226.90]) by FMSMGA003.fm.intel.com with ESMTP; 12 Feb 2016 01:39:24 -0800 From: Derek Morton To: intel-gfx@lists.freedesktop.org Date: Fri, 12 Feb 2016 09:38:54 +0000 Message-Id: <1455269934-7586-5-git-send-email-derek.j.morton@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1455269934-7586-1-git-send-email-derek.j.morton@intel.com> References: <1455269934-7586-1-git-send-email-derek.j.morton@intel.com> Cc: daniel.vetter@ffwll.ch Subject: [Intel-gfx] [PATCH i-g-t 4/4] tests/gem_scheduler: Add subtests to test batch priority behaviour X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add subtests to test each ring to check batch buffers of a higher priority will be executed before batch buffers of a lower priority. Signed-off-by: Derek Morton --- tests/gem_scheduler.c | 34 ++++++++++++++++++++++++++++------ 1 file changed, 28 insertions(+), 6 deletions(-) diff --git a/tests/gem_scheduler.c b/tests/gem_scheduler.c index 4824c13..febde01 100644 --- a/tests/gem_scheduler.c +++ b/tests/gem_scheduler.c @@ -39,7 +39,8 @@ IGT_TEST_DESCRIPTION("Check scheduler behaviour. Basic tests ensure independant " "batch buffers of the same priority are executed in " - "submission order. Read-read tests ensure " + "submission order. Priority tests ensure higher priority " + "batch buffers are executed first. Read-read tests ensure " "batch buffers with a read dependency to the same buffer " "object do not block each other. Write-write dependency " "tests ensure batch buffers with a write dependency to a " @@ -61,11 +62,13 @@ struct ring { #define NBR_RINGS (sizeof(rings)/sizeof(struct ring)) -/* Basic test. Check batch buffers of the same priority and with no dependencies - * are executed in the order they are submitted. +/* If 'priority' is set false, check batch buffers of the same priority and with + * no dependencies are executed in the order they are submitted. + * If 'priority' is set true, check batch buffers of higher priority are + * executed before batch buffers of lower priority. */ #define NBR_BASIC_FDs (3) -static void run_test_basic(int in_flight, int ringid) +static void run_test_basic(int in_flight, int ringid, bool priority) { int fd[NBR_BASIC_FDs]; int loop; @@ -95,6 +98,15 @@ static void run_test_basic(int in_flight, int ringid) intel_batchbuffer_free(noop_bb); } + if(priority) { + struct local_i915_gem_context_param param; + param.context = 0; /* Default context */ + param.size = 0; + param.param = LOCAL_CONTEXT_PARAM_PRIORITY; + param.value = 1000; + gem_context_set_param(fd[2], ¶m); + } + /* Create buffer objects */ delay_bo = drm_intel_bo_alloc(bufmgr[0], "delay bo", BATCH_SZ, BATCH_SZ); igt_assert(delay_bo); @@ -146,7 +158,12 @@ static void run_test_basic(int in_flight, int ringid) igt_assert_f(igt_compare_timestamps(delay_buf[2], ts1_buf[0]), "Delay ts (0x%08" PRIx32 ") > TS1 ts (0x%08" PRIx32 ")\n", delay_buf[2], ts1_buf[0]); - igt_assert_f(igt_compare_timestamps(ts1_buf[0], ts2_buf[0]), + if(priority) + igt_assert_f(igt_compare_timestamps(ts2_buf[0], ts1_buf[0]), + "TS2 ts (0x%08" PRIx32 ") > TS1 ts (0x%08" PRIx32 ")\n", + ts2_buf[0], ts1_buf[0]); + else + igt_assert_f(igt_compare_timestamps(ts1_buf[0], ts2_buf[0]), "TS1 ts (0x%08" PRIx32 ") > TS2 ts (0x%08" PRIx32 ")\n", ts1_buf[0], ts2_buf[0]); @@ -393,7 +410,12 @@ igt_main for (loop=0; loop < NBR_RINGS; loop++) igt_subtest_f("%s-basic", rings[loop].name) { - run_test_basic(in_flight, rings[loop].id); + run_test_basic(in_flight, rings[loop].id, false); + } + + for (loop=0; loop < NBR_RINGS; loop++) + igt_subtest_f("%s-priority", rings[loop].name) { + run_test_basic(in_flight, rings[loop].id, true); } for (loop=0; loop < NBR_RINGS; loop++)