From patchwork Wed Feb 17 10:40:19 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Micha=C5=82_Winiarski?= X-Patchwork-Id: 8336461 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id E93CB9F399 for ; Wed, 17 Feb 2016 10:40:53 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2BA5120256 for ; Wed, 17 Feb 2016 10:40:50 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id A5F6620254 for ; Wed, 17 Feb 2016 10:40:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4F73C6E1D1; Wed, 17 Feb 2016 10:40:43 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id A7B8B6E1D1 for ; Wed, 17 Feb 2016 10:40:41 +0000 (UTC) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP; 17 Feb 2016 02:40:25 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,459,1449561600"; d="scan'208";a="904305503" Received: from irsmsx102.ger.corp.intel.com ([163.33.3.155]) by fmsmga001.fm.intel.com with ESMTP; 17 Feb 2016 02:40:24 -0800 Received: from mwiniars-desk1.ger.corp.intel.com (172.28.173.39) by IRSMSX102.ger.corp.intel.com (163.33.3.155) with Microsoft SMTP Server id 14.3.248.2; Wed, 17 Feb 2016 10:40:23 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Date: Wed, 17 Feb 2016 11:40:19 +0100 Message-ID: <1455705619-29902-1-git-send-email-michal.winiarski@intel.com> X-Mailer: git-send-email 2.7.1 MIME-Version: 1.0 X-Originating-IP: [172.28.173.39] Subject: [Intel-gfx] [PATCH libdrm] intel/skl: Add missing SKL PCI IDs X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Used by production devices: Intel(R) HD Graphics 510 Intel(R) HD Graphics 535 Intel(R) Iris(TM) Graphics 550 Intel(R) Iris(TM) Graphics P555 Signed-off-by: Micha? Winiarski Tested-by: Lionel Landwerlin Tested-by: Lionel Landwerlin --- intel/intel_chipset.h | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h index 35148e5..f52e149 100644 --- a/intel/intel_chipset.h +++ b/intel/intel_chipset.h @@ -168,6 +168,7 @@ #define PCI_CHIP_SKYLAKE_DT_GT1 0x1902 #define PCI_CHIP_SKYLAKE_ULT_GT1 0x1906 #define PCI_CHIP_SKYLAKE_SRV_GT1 0x190A /* Reserved */ +#define PCI_CHIP_SKYLAKE_H_GT1 0x190B #define PCI_CHIP_SKYLAKE_ULX_GT1 0x190E /* Reserved */ #define PCI_CHIP_SKYLAKE_DT_GT2 0x1912 #define PCI_CHIP_SKYLAKE_FUSED0_GT2 0x1913 /* Reserved */ @@ -179,9 +180,12 @@ #define PCI_CHIP_SKYLAKE_WKS_GT2 0x191D #define PCI_CHIP_SKYLAKE_ULX_GT2 0x191E #define PCI_CHIP_SKYLAKE_MOBILE_GT2 0x1921 /* Reserved */ -#define PCI_CHIP_SKYLAKE_GT3 0x1926 -#define PCI_CHIP_SKYLAKE_HALO_GT3 0x192B /* Reserved */ +#define PCI_CHIP_SKYLAKE_ULT_GT3_0 0x1923 +#define PCI_CHIP_SKYLAKE_ULT_GT3_1 0x1926 +#define PCI_CHIP_SKYLAKE_ULT_GT3_2 0x1927 #define PCI_CHIP_SKYLAKE_SRV_GT4 0x192A +#define PCI_CHIP_SKYLAKE_HALO_GT3 0x192B /* Reserved */ +#define PCI_CHIP_SKYLAKE_SRV_GT3 0x192D #define PCI_CHIP_SKYLAKE_DT_GT4 0x1932 #define PCI_CHIP_SKYLAKE_SRV_GT4X 0x193A #define PCI_CHIP_SKYLAKE_H_GT4 0x193B @@ -373,10 +377,11 @@ #define IS_GEN8(devid) (IS_BROADWELL(devid) || \ IS_CHERRYVIEW(devid)) -#define IS_SKL_GT1(devid) ((devid) == PCI_CHIP_SKYLAKE_ULT_GT1 || \ - (devid) == PCI_CHIP_SKYLAKE_ULX_GT1 || \ - (devid) == PCI_CHIP_SKYLAKE_DT_GT1 || \ - (devid) == PCI_CHIP_SKYLAKE_SRV_GT1) +#define IS_SKL_GT1(devid) ((devid) == PCI_CHIP_SKYLAKE_DT_GT1 || \ + (devid) == PCI_CHIP_SKYLAKE_ULT_GT1 || \ + (devid) == PCI_CHIP_SKYLAKE_SRV_GT1 || \ + (devid) == PCI_CHIP_SKYLAKE_H_GT1 || \ + (devid) == PCI_CHIP_SKYLAKE_ULX_GT1) #define IS_SKL_GT2(devid) ((devid) == PCI_CHIP_SKYLAKE_DT_GT2 || \ (devid) == PCI_CHIP_SKYLAKE_FUSED0_GT2 || \ @@ -389,8 +394,11 @@ (devid) == PCI_CHIP_SKYLAKE_ULX_GT2 || \ (devid) == PCI_CHIP_SKYLAKE_MOBILE_GT2) -#define IS_SKL_GT3(devid) ((devid) == PCI_CHIP_SKYLAKE_GT3 || \ - (devid) == PCI_CHIP_SKYLAKE_HALO_GT3) +#define IS_SKL_GT3(devid) ((devid) == PCI_CHIP_SKYLAKE_ULT_GT3_0 || \ + (devid) == PCI_CHIP_SKYLAKE_ULT_GT3_1 || \ + (devid) == PCI_CHIP_SKYLAKE_ULT_GT3_2 || \ + (devid) == PCI_CHIP_SKYLAKE_HALO_GT3 || \ + (devid) == PCI_CHIP_SKYLAKE_SRV_GT3) #define IS_SKL_GT4(devid) ((devid) == PCI_CHIP_SKYLAKE_SRV_GT4 || \ (devid) == PCI_CHIP_SKYLAKE_DT_GT4 || \