diff mbox

[RESEND_FOR_CI] drm/i915/lrc: Only set RS ctx enable in ctx control reg if there is a RS

Message ID 1456393738-35608-1-git-send-email-michel.thierry@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Michel Thierry Feb. 25, 2016, 9:48 a.m. UTC 
The driver should only set the "RS context enable" bit in the context
image if we plan to use the resource streamer.

Reviewed-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Michel Thierry Feb. 25, 2016, 2:22 p.m. UTC | #1 
On Thu, Feb 25, 2016 at 11:10 AM, Patchwork 
<patchwork@emeril.freedesktop.org> wrote:
> == Series Details ==
>
> Series: drm/i915/lrc: Only set RS ctx enable in ctx control reg if there
> is a RS (rev2)
> URL   : https://patchwork.freedesktop.org/series/3725/
> State : failure
>
> == Summary ==
>
> Series 3725v2 drm/i915/lrc: Only set RS ctx enable in ctx control reg if
> there is a RS
> http://patchwork.freedesktop.org/api/1.0/series/3725/revisions/2/mbox/
>
> Test drv_hangman:
>          Subgroup error-state-basic:
>                  pass       -> FAIL       (ilk-hp8440p)

(drv_hangman:6411) DEBUG: dfs entry i915_error_state read 'no error 
state collected'

So hangman wasn't able to hang the ring?


> Test gem_sync:
>          Subgroup basic-default:
>                  pass       -> DMESG-FAIL (hsw-brixbox)

[  406.005039] [drm:i915_hangcheck_elapsed [i915]] *ERROR* Hangcheck 
timer elapsed... render ring idle

This looks like a real regression (but unrelated to this patch, hsw 
doesn't use execlists). I opened 
https://bugs.freedesktop.org/show_bug.cgi?id=94289
Unfortunately I don't have a hsw to do a bisect.


> Test kms_flip:
>          Subgroup basic-flip-vs-modeset:
>                  pass       -> DMESG-WARN (ilk-hp8440p) UNSTABLE

The usual
[  196.712245] [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* 
CPU pipe A FIFO underrun


> Test kms_force_connector_basic:
>          Subgroup force-load-detect:
>                  fail       -> DMESG-FAIL (ilk-hp8440p)
Again, unrelated to this patch, snd and ilk don't have execlists.

Looks like it has been like this for a while: 
/archive/results/CI_IGT_test/igt@kms_force_connector_basic@force-load-detect.html

Also, this subtest is quite recent, 
https://cgit.freedesktop.org/xorg/app/intel-gpu-tools/commit/?id=7670e286f5043d04af0cd1e6df1f092b5bcaf09e

> Test kms_pipe_crc_basic:
>          Subgroup nonblocking-crc-pipe-a-frame-sequence:
>                  pass       -> DMESG-WARN (ilk-hp8440p)

Again,
[  682.562490] [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* 
CPU pipe A FIFO underrun

>          Subgroup suspend-read-crc-pipe-b:
>                  pass       -> DMESG-WARN (skl-i7k-2) UNSTABLE

Same as: https://bugs.freedesktop.org/show_bug.cgi?id=93294 (cpu_hotplug 
lockdep fail).

>          Subgroup suspend-read-crc-pipe-c:
>                  pass       -> SKIP       (bsw-nuc-2)
>                  pass       -> SKIP       (hsw-brixbox)
>                  dmesg-warn -> PASS       (skl-i7k-2) UNSTABLE
> Test pm_rpm:
>          Subgroup basic-pci-d3-state:
>                  dmesg-warn -> PASS       (bsw-nuc-2)
>
> bdw-nuci7        total:165  pass:154  dwarn:0   dfail:0   fail:0   skip:11
> bdw-ultra        total:168  pass:154  dwarn:0   dfail:0   fail:0   skip:14
> bsw-nuc-2        total:168  pass:136  dwarn:0   dfail:0   fail:1   skip:31
> byt-nuc          total:168  pass:143  dwarn:0   dfail:0   fail:0   skip:25
> hsw-brixbox      total:168  pass:152  dwarn:0   dfail:1   fail:0   skip:15
> hsw-gt2          total:168  pass:157  dwarn:0   dfail:1   fail:0   skip:10
> ilk-hp8440p      total:168  pass:115  dwarn:2   dfail:1   fail:1   skip:49
> ivb-t430s        total:168  pass:153  dwarn:0   dfail:0   fail:1   skip:14
> skl-i7k-2        total:168  pass:151  dwarn:1   dfail:0   fail:0   skip:16
> snb-dellxps      total:168  pass:145  dwarn:0   dfail:0   fail:1   skip:22
> snb-x220t        total:168  pass:145  dwarn:0   dfail:0   fail:2   skip:21
>
> Results at /archive/results/CI_IGT_test/Patchwork_1473/
>
> eb8b161ee8760105238ce372afa47b4565590125 drm-intel-nightly:
> 2016y-02m-25d-08h-16m-19s UTC integration manifest
> b593d5b2bb8f88797651fda8e988794699da8eba drm/i915/lrc: Only set RS ctx
> enable in ctx control reg if there is a RS
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org <mailto:Intel-gfx@lists.freedesktop.org>
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
Tvrtko Ursulin Feb. 26, 2016, 11:33 a.m. UTC | #2 
On 25/02/16 14:22, Michel Thierry wrote:
> On Thu, Feb 25, 2016 at 11:10 AM, Patchwork
> <patchwork@emeril.freedesktop.org> wrote:
>> == Series Details ==
>>
>> Series: drm/i915/lrc: Only set RS ctx enable in ctx control reg if there
>> is a RS (rev2)
>> URL   : https://patchwork.freedesktop.org/series/3725/
>> State : failure
>>
>> == Summary ==
>>
>> Series 3725v2 drm/i915/lrc: Only set RS ctx enable in ctx control reg if
>> there is a RS
>> http://patchwork.freedesktop.org/api/1.0/series/3725/revisions/2/mbox/
>>
>> Test drv_hangman:
>>          Subgroup error-state-basic:
>>                  pass       -> FAIL       (ilk-hp8440p)
>
> (drv_hangman:6411) DEBUG: dfs entry i915_error_state read 'no error
> state collected'
>
> So hangman wasn't able to hang the ring?
>
>
>> Test gem_sync:
>>          Subgroup basic-default:
>>                  pass       -> DMESG-FAIL (hsw-brixbox)
>
> [  406.005039] [drm:i915_hangcheck_elapsed [i915]] *ERROR* Hangcheck
> timer elapsed... render ring idle
>
> This looks like a real regression (but unrelated to this patch, hsw
> doesn't use execlists). I opened
> https://bugs.freedesktop.org/show_bug.cgi?id=94289
> Unfortunately I don't have a hsw to do a bisect.
>
>
>> Test kms_flip:
>>          Subgroup basic-flip-vs-modeset:
>>                  pass       -> DMESG-WARN (ilk-hp8440p) UNSTABLE
>
> The usual
> [  196.712245] [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR*
> CPU pipe A FIFO underrun
>
>
>> Test kms_force_connector_basic:
>>          Subgroup force-load-detect:
>>                  fail       -> DMESG-FAIL (ilk-hp8440p)
> Again, unrelated to this patch, snd and ilk don't have execlists.
>
> Looks like it has been like this for a while:
> /archive/results/CI_IGT_test/igt@kms_force_connector_basic@force-load-detect.html
>
>
> Also, this subtest is quite recent,
> https://cgit.freedesktop.org/xorg/app/intel-gpu-tools/commit/?id=7670e286f5043d04af0cd1e6df1f092b5bcaf09e
>
>
>> Test kms_pipe_crc_basic:
>>          Subgroup nonblocking-crc-pipe-a-frame-sequence:
>>                  pass       -> DMESG-WARN (ilk-hp8440p)
>
> Again,
> [  682.562490] [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR*
> CPU pipe A FIFO underrun
>
>>          Subgroup suspend-read-crc-pipe-b:
>>                  pass       -> DMESG-WARN (skl-i7k-2) UNSTABLE
>
> Same as: https://bugs.freedesktop.org/show_bug.cgi?id=93294 (cpu_hotplug
> lockdep fail).
>
>>          Subgroup suspend-read-crc-pipe-c:
>>                  pass       -> SKIP       (bsw-nuc-2)
>>                  pass       -> SKIP       (hsw-brixbox)
>>                  dmesg-warn -> PASS       (skl-i7k-2) UNSTABLE
>> Test pm_rpm:
>>          Subgroup basic-pci-d3-state:
>>                  dmesg-warn -> PASS       (bsw-nuc-2)
>>
>> bdw-nuci7        total:165  pass:154  dwarn:0   dfail:0   fail:0
>> skip:11
>> bdw-ultra        total:168  pass:154  dwarn:0   dfail:0   fail:0
>> skip:14
>> bsw-nuc-2        total:168  pass:136  dwarn:0   dfail:0   fail:1
>> skip:31
>> byt-nuc          total:168  pass:143  dwarn:0   dfail:0   fail:0
>> skip:25
>> hsw-brixbox      total:168  pass:152  dwarn:0   dfail:1   fail:0
>> skip:15
>> hsw-gt2          total:168  pass:157  dwarn:0   dfail:1   fail:0
>> skip:10
>> ilk-hp8440p      total:168  pass:115  dwarn:2   dfail:1   fail:1
>> skip:49
>> ivb-t430s        total:168  pass:153  dwarn:0   dfail:0   fail:1
>> skip:14
>> skl-i7k-2        total:168  pass:151  dwarn:1   dfail:0   fail:0
>> skip:16
>> snb-dellxps      total:168  pass:145  dwarn:0   dfail:0   fail:1
>> skip:22
>> snb-x220t        total:168  pass:145  dwarn:0   dfail:0   fail:2
>> skip:21
>>
>> Results at /archive/results/CI_IGT_test/Patchwork_1473/
>>
>> eb8b161ee8760105238ce372afa47b4565590125 drm-intel-nightly:
>> 2016y-02m-25d-08h-16m-19s UTC integration manifest
>> b593d5b2bb8f88797651fda8e988794699da8eba drm/i915/lrc: Only set RS ctx
>> enable in ctx control reg if there is a RS

Merged, thanks for the patch! :)

Regards,

Tvrtko
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index e12fcab..c3779b9 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -2382,7 +2382,8 @@  populate_lr_context(struct intel_context *ctx, struct drm_i915_gem_object *ctx_o
 	ASSIGN_CTX_REG(reg_state, CTX_CONTEXT_CONTROL, RING_CONTEXT_CONTROL(ring),
 		       _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH |
 					  CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT |
-					  CTX_CTRL_RS_CTX_ENABLE));
+					  (HAS_RESOURCE_STREAMER(dev) ?
+					    CTX_CTRL_RS_CTX_ENABLE : 0)));
 	ASSIGN_CTX_REG(reg_state, CTX_RING_HEAD, RING_HEAD(ring->mmio_base), 0);
 	ASSIGN_CTX_REG(reg_state, CTX_RING_TAIL, RING_TAIL(ring->mmio_base), 0);
 	/* Ring buffer start address is not known until the buffer is pinned.