From patchwork Fri Mar 11 10:59:42 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Wang, Zhi A" X-Patchwork-Id: 8564711 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id CB60DC0553 for ; Fri, 11 Mar 2016 11:11:22 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DCFBA2034B for ; Fri, 11 Mar 2016 11:11:21 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id EBD322035D for ; Fri, 11 Mar 2016 11:11:20 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C4AB46E2AF; Fri, 11 Mar 2016 11:11:16 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id 8A57B6E2A7 for ; Fri, 11 Mar 2016 11:10:59 +0000 (UTC) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga103.jf.intel.com with ESMTP; 11 Mar 2016 03:10:59 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,320,1455004800"; d="scan'208";a="64211316" Received: from dev-inno.bj.intel.com ([10.238.135.69]) by fmsmga004.fm.intel.com with ESMTP; 11 Mar 2016 03:03:45 -0800 From: Zhi Wang To: intel-gfx@lists.freedesktop.org, igvt-g@lists.01.org Date: Fri, 11 Mar 2016 18:59:42 +0800 Message-Id: <1457693986-6892-12-git-send-email-zhi.a.wang@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1457693986-6892-1-git-send-email-zhi.a.wang@intel.com> References: <1457693986-6892-1-git-send-email-zhi.a.wang@intel.com> Cc: daniel.vetter@ffwll.ch, david.j.cowperthwaite@intel.com, zhiyuan.lv@intel.com Subject: [Intel-gfx] [RFCv3 11/15] drm/i915: Introduce execlist context status change notification X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch introduces an approach to track the execlist context status change. GVT-g uses GVT context as the "shadow context". The content inside GVT context will be copied back to guest after the context is idle. So GVT-g has to know the status of the execlist context. This function is configurable in the context creation service. Currently, Only GVT-g will create the "status-change-notification" enabled GEM context. Signed-off-by: Zhi Wang --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/intel_lrc.c | 28 ++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_lrc.h | 6 ++++++ 3 files changed, 36 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 1281bbf..68b821a 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -892,6 +892,8 @@ struct intel_context { u64 lrc_desc; uint32_t *lrc_reg_state; bool root_pointer_dirty; + bool need_status_change_notification; + struct atomic_notifier_head status_notifier_head; } engine[I915_NUM_RINGS]; struct list_head link; diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 19c6b46..ae1ab92 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -439,6 +439,18 @@ static void execlists_submit_requests(struct drm_i915_gem_request *rq0, execlists_elsp_write(rq0, rq1); } +static inline void execlists_context_status_change( + struct intel_context *ctx, + struct intel_engine_cs *ring, + unsigned long status) +{ + if (!ctx->engine[ring->id].need_status_change_notification) + return; + + atomic_notifier_call_chain(&ctx->engine[ring->id].status_notifier_head, + status, NULL); +} + static void execlists_context_unqueue(struct intel_engine_cs *ring) { struct drm_i915_gem_request *req0 = NULL, *req1 = NULL; @@ -495,6 +507,13 @@ static void execlists_context_unqueue(struct intel_engine_cs *ring) WARN_ON(req1 && req1->elsp_submitted); + execlists_context_status_change(req0->ctx, ring, CONTEXT_SCHEDULE_IN); + + if (req1) { + execlists_context_status_change(req1->ctx, + ring, CONTEXT_SCHEDULE_IN); + } + execlists_submit_requests(req0, req1); } @@ -515,6 +534,8 @@ static bool execlists_check_remove_request(struct intel_engine_cs *ring, "Never submitted head request\n"); if (--head_req->elsp_submitted <= 0) { + execlists_context_status_change(head_req->ctx, + ring, CONTEXT_SCHEDULE_OUT); list_move_tail(&head_req->execlist_link, &ring->execlist_retired_req_list); return true; @@ -2590,6 +2611,13 @@ int __intel_lr_context_deferred_alloc(struct intel_context *ctx, } i915_add_request_no_flush(req); } + + if (params->ctx_needs_status_change_notification) { + ctx->engine[ring->id].need_status_change_notification = true; + ATOMIC_INIT_NOTIFIER_HEAD( + &ctx->engine[ring->id].status_notifier_head); + } + return 0; error_ringbuf: diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h index 528c4fb..15791d4 100644 --- a/drivers/gpu/drm/i915/intel_lrc.h +++ b/drivers/gpu/drm/i915/intel_lrc.h @@ -54,6 +54,11 @@ #define GEN8_CSB_READ_PTR(csb_status) \ (((csb_status) & GEN8_CSB_READ_PTR_MASK) >> 8) +enum { + CONTEXT_SCHEDULE_IN = 0, + CONTEXT_SCHEDULE_OUT, +}; + /* Logical Rings */ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request); int intel_logical_ring_reserve_space(struct drm_i915_gem_request *request); @@ -101,6 +106,7 @@ struct intel_lr_context_alloc_params { struct intel_engine_cs *ring; u32 ringbuffer_size; bool ctx_needs_init; + bool ctx_needs_status_change_notification; }; void intel_lr_context_free(struct intel_context *ctx);