From patchwork Fri Mar 11 10:59:43 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Wang, Zhi A" X-Patchwork-Id: 8564781 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id EFFE29FDE7 for ; Fri, 11 Mar 2016 11:11:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1CE6220219 for ; Fri, 11 Mar 2016 11:11:45 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 0571A20340 for ; Fri, 11 Mar 2016 11:11:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CA3BF6EA88; Fri, 11 Mar 2016 11:11:39 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id E8B906E0F8 for ; Fri, 11 Mar 2016 11:10:59 +0000 (UTC) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga103.jf.intel.com with ESMTP; 11 Mar 2016 03:10:59 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,320,1455004800"; d="scan'208";a="64211317" Received: from dev-inno.bj.intel.com ([10.238.135.69]) by fmsmga004.fm.intel.com with ESMTP; 11 Mar 2016 03:03:48 -0800 From: Zhi Wang To: intel-gfx@lists.freedesktop.org, igvt-g@lists.01.org Date: Fri, 11 Mar 2016 18:59:43 +0800 Message-Id: <1457693986-6892-13-git-send-email-zhi.a.wang@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1457693986-6892-1-git-send-email-zhi.a.wang@intel.com> References: <1457693986-6892-1-git-send-email-zhi.a.wang@intel.com> Cc: daniel.vetter@ffwll.ch, david.j.cowperthwaite@intel.com, zhiyuan.lv@intel.com Subject: [Intel-gfx] [RFCv3 12/15] drm/i915: Support context single submission X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch introduces the support of context signle submission. As GVT context may come from different guests, which requires different configuration of render registers. It can't be combined in a dual ELSP submission combo. We make this function as a context feature in context creation service. Only GVT-g will create this kinds of GEM context currently. Signed-off-by: Zhi Wang --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_lrc.c | 10 +++++++++- drivers/gpu/drm/i915/intel_lrc.h | 1 + 3 files changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 68b821a..d7fc738 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -895,6 +895,7 @@ struct intel_context { bool need_status_change_notification; struct atomic_notifier_head status_notifier_head; } engine[I915_NUM_RINGS]; + bool single_submission; struct list_head link; }; diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index ae1ab92..3a047fe 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -472,6 +472,9 @@ static void execlists_context_unqueue(struct intel_engine_cs *ring) execlist_link) { if (!req0) { req0 = cursor; + /* req0 ctx requires single submission, stop picking */ + if (req0->ctx->single_submission) + break; } else if (req0->ctx == cursor->ctx) { /* Same ctx: ignore first request, as second request * will update tail past first request's workload */ @@ -480,7 +483,12 @@ static void execlists_context_unqueue(struct intel_engine_cs *ring) &ring->execlist_retired_req_list); req0 = cursor; } else { - req1 = cursor; + /* + * req0 ctx doesn't require single submission, but + * next req ctx requires, stop picking req1 + */ + if (!cursor->ctx->single_submission) + req1 = cursor; break; } } diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h index 15791d4..4873dd8 100644 --- a/drivers/gpu/drm/i915/intel_lrc.h +++ b/drivers/gpu/drm/i915/intel_lrc.h @@ -107,6 +107,7 @@ struct intel_lr_context_alloc_params { u32 ringbuffer_size; bool ctx_needs_init; bool ctx_needs_status_change_notification; + bool ctx_needs_single_submission; }; void intel_lr_context_free(struct intel_context *ctx);