diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 88f9041..972b4ce 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1709,8 +1709,30 @@ struct i915_workarounds {
 	u32 hw_whitelist_count[I915_NUM_RINGS];
 };
 
+/*
+ * Under GVT-g, i915 host driver only owned limited graphics resources,
+ * others are managed by GVT-g resource allocator and kept for other vGPUs.
+ *
+ * For graphics memory space partition, a typical layout looks like:
+ *
+ * +-------+-----------------------+------+-----------------------+
+ * |* Host |   *GVT-g Resource     |* Host|   *GVT-g Resource     |
+ * | Owned |   Allocator Managed   | Owned|   Allocator Managed   |
+ * |       |                       |      |                       |
+ * +---------------+-------+----------------------+-------+-------+
+ * |       |       |       |       |      |       |       |       |
+ * | i915  | vm 1  | vm 2  | vm 3  | i915 | vm 1  | vm 2  | vm 3  |
+ * |       |       |       |       |      |       |       |       |
+ * +-------+-------+-------+--------------+-------+-------+-------+
+ * |           Aperture            |            Hidden            |
+ * +-------------------------------+------------------------------+
+ * |                       GGTT memory space                      |
+ * +--------------------------------------------------------------+
+ */
 struct i915_gvt {
 	void *gvt_device;
+	u64 low_gm_size;
+	u64 high_gm_size;
 };
 
 struct i915_virtual_gpu {
diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c
index 836defe..5b364b4 100644
--- a/drivers/gpu/drm/i915/i915_vgpu.c
+++ b/drivers/gpu/drm/i915/i915_vgpu.c
@@ -194,10 +194,23 @@ int intel_vgt_balloon(struct drm_device *dev)
 	if (!intel_vgpu_active(dev) && !intel_gvt_active(dev))
 		return 0;
 
-	mappable_base = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.base));
-	mappable_size = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.size));
-	unmappable_base = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.base));
-	unmappable_size = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.size));
+	if (intel_gvt_active(dev)) {
+		mappable_base = 0;
+		mappable_size = dev_priv->gvt.low_gm_size;
+		unmappable_base = dev_priv->gtt.mappable_end;
+		unmappable_size = dev_priv->gvt.high_gm_size;
+	} else if (intel_vgpu_active(dev)) {
+		mappable_base = I915_READ(
+			vgtif_reg(avail_rs.mappable_gmadr.base));
+		mappable_size = I915_READ(
+			vgtif_reg(avail_rs.mappable_gmadr.size));
+		unmappable_base = I915_READ(
+			vgtif_reg(avail_rs.nonmappable_gmadr.base));
+		unmappable_size = I915_READ(
+			vgtif_reg(avail_rs.nonmappable_gmadr.size));
+	} else {
+		return -ENODEV;
+	}
 
 	mappable_end = mappable_base + mappable_size;
 	unmappable_end = unmappable_base + unmappable_size;
diff --git a/drivers/gpu/drm/i915/intel_gvt.c b/drivers/gpu/drm/i915/intel_gvt.c
index a89b0ad..8efc1cb 100644
--- a/drivers/gpu/drm/i915/intel_gvt.c
+++ b/drivers/gpu/drm/i915/intel_gvt.c
@@ -43,6 +43,46 @@ struct gvt_kernel_params gvt = {
 module_param_named(gvt_enable, gvt.enable, bool, 0600);
 MODULE_PARM_DESC(gvt_enable, "Enable Intel GVT-g host support");
 
+/* i915.gvt_low_gm_size */
+module_param_named(gvt_low_gm_size, gvt.low_gm_size, charp, 0600);
+MODULE_PARM_DESC(gvt_low_gm_size, "GVT low graphics memory size");
+
+/* i915.gvt_high_gm_size */
+module_param_named(gvt_high_gm_size, gvt.high_gm_size, charp, 0600);
+MODULE_PARM_DESC(gvt_high_gm_size, "GVT high graphics memory size");
+
+#define KB(x) ((x) * 1024)
+#define MB(x) (KB(x) * 1024)
+
+#define MAX_GVT_LOW_GM_SIZE	MB(96)
+#define MAX_GVT_HIGH_GM_SIZE	MB(384)
+
+static void setup_gm_size(struct drm_i915_private *dev_priv)
+{
+	u64 low_gm_size, high_gm_size;
+
+	low_gm_size = high_gm_size = 0;
+
+	/* Try to parse kernel parameter first */
+	if (gvt.low_gm_size)
+		low_gm_size = memparse(gvt.low_gm_size, NULL);
+
+	if (gvt.high_gm_size)
+		high_gm_size = memparse(gvt.high_gm_size, NULL);
+
+	if (!low_gm_size || low_gm_size > MAX_GVT_LOW_GM_SIZE)
+		low_gm_size = MAX_GVT_LOW_GM_SIZE;
+
+	if (!high_gm_size || high_gm_size > MAX_GVT_HIGH_GM_SIZE)
+		high_gm_size = MAX_GVT_HIGH_GM_SIZE;
+
+	dev_priv->gvt.low_gm_size = low_gm_size;
+	dev_priv->gvt.high_gm_size = high_gm_size;
+
+	DRM_DEBUG_DRIVER("GVT low graphics memory size: %llx\n", low_gm_size);
+	DRM_DEBUG_DRIVER("GVT high graphics memory size: %llx\n", high_gm_size);
+}
+
 static bool is_supported_device(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = to_i915(dev);
@@ -52,6 +92,7 @@ static bool is_supported_device(struct drm_device *dev)
 
 	return false;
 }
+
 /**
  * intel_gvt_init - initialize GVT components at the beginning of i915
  * driver loading.
@@ -75,6 +116,8 @@ int intel_gvt_init(struct drm_device *dev)
 		return 0;
 	}
 
+	setup_gm_size(dev_priv);
+
 	dev_priv->gvt.gvt_device = gvt_create_device(dev);
 	if (intel_gvt_active(dev))
 		DRM_DEBUG_DRIVER("GVT-g is running in host mode\n");
diff --git a/drivers/gpu/drm/i915/intel_gvt.h b/drivers/gpu/drm/i915/intel_gvt.h
index 9be5a4f..2b98244 100644
--- a/drivers/gpu/drm/i915/intel_gvt.h
+++ b/drivers/gpu/drm/i915/intel_gvt.h
@@ -30,6 +30,8 @@
 
 struct gvt_kernel_params {
 	bool enable;
+	char *low_gm_size;
+	char *high_gm_size;
 };
 
 extern struct gvt_kernel_params gvt;
