From patchwork Fri Mar 18 10:46:59 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthew Auld X-Patchwork-Id: 8618191 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 19EE0C0553 for ; Fri, 18 Mar 2016 10:47:43 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3B209202BE for ; Fri, 18 Mar 2016 10:47:42 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 4395B20138 for ; Fri, 18 Mar 2016 10:47:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8A3A26E078; Fri, 18 Mar 2016 10:47:39 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id E078A6E078 for ; Fri, 18 Mar 2016 10:47:18 +0000 (UTC) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP; 18 Mar 2016 03:47:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,354,1455004800"; d="scan'208";a="671817199" Received: from unknown (HELO localhost.isw.intel.com) ([10.237.224.39]) by FMSMGA003.fm.intel.com with ESMTP; 18 Mar 2016 03:47:11 -0700 From: Matthew Auld To: intel-gfx@lists.freedesktop.org Date: Fri, 18 Mar 2016 10:46:59 +0000 Message-Id: <1458298019-3755-1-git-send-email-matthew.auld@intel.com> X-Mailer: git-send-email 2.4.3 Subject: [Intel-gfx] [PATCH] drm/i915: simplify bind_to_vm init code X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP No functional change, just makes the code easier to follow. v2: - Remove local fence_size variable (Tvrtko Ursulin) - Remove redundant NULL ggtt_view check - Reuse size variable Signed-off-by: Matthew Auld Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_gem.c | 51 +++++++++++------------------------------ 1 file changed, 14 insertions(+), 37 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index f45856d..e5d9d0b 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -3468,50 +3468,27 @@ i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj, u32 fence_alignment, unfenced_alignment; u32 search_flag, alloc_flag; u64 start, end; - u64 size, fence_size; + u64 size; struct i915_vma *vma; int ret; - if (i915_is_ggtt(vm)) { - u32 view_size; - - if (WARN_ON(!ggtt_view)) - return ERR_PTR(-EINVAL); - - view_size = i915_ggtt_view_size(obj, ggtt_view); - - fence_size = i915_gem_get_gtt_size(dev, - view_size, - obj->tiling_mode); - fence_alignment = i915_gem_get_gtt_alignment(dev, - view_size, - obj->tiling_mode, - true); - unfenced_alignment = i915_gem_get_gtt_alignment(dev, - view_size, - obj->tiling_mode, - false); - size = flags & PIN_MAPPABLE ? fence_size : view_size; - } else { - fence_size = i915_gem_get_gtt_size(dev, - obj->base.size, - obj->tiling_mode); - fence_alignment = i915_gem_get_gtt_alignment(dev, - obj->base.size, - obj->tiling_mode, - true); - unfenced_alignment = - i915_gem_get_gtt_alignment(dev, - obj->base.size, - obj->tiling_mode, - false); - size = flags & PIN_MAPPABLE ? fence_size : obj->base.size; - } + if (i915_is_ggtt(vm)) + size = i915_ggtt_view_size(obj, ggtt_view); + else + size = obj->base.size; + + fence_alignment = i915_gem_get_gtt_alignment(dev, size, + obj->tiling_mode, true); + unfenced_alignment = i915_gem_get_gtt_alignment(dev, size, + obj->tiling_mode, + false); start = flags & PIN_OFFSET_BIAS ? flags & PIN_OFFSET_MASK : 0; end = vm->total; - if (flags & PIN_MAPPABLE) + if (flags & PIN_MAPPABLE) { end = min_t(u64, end, dev_priv->gtt.mappable_end); + size = i915_gem_get_gtt_size(dev, size, obj->tiling_mode); + } if (flags & PIN_ZONE_4G) end = min_t(u64, end, (1ULL << 32) - PAGE_SIZE);