From patchwork Thu Mar 24 19:16:08 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zanoni, Paulo R" X-Patchwork-Id: 8664021 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4B2B1C0553 for ; Thu, 24 Mar 2016 19:16:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6EEB620395 for ; Thu, 24 Mar 2016 19:16:31 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 8374C20390 for ; Thu, 24 Mar 2016 19:16:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BF8A36E18D; Thu, 24 Mar 2016 19:16:19 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTP id C01476EA00 for ; Thu, 24 Mar 2016 19:16:17 +0000 (UTC) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga104.fm.intel.com with ESMTP; 24 Mar 2016 12:16:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,386,1455004800"; d="scan'208";a="675145444" Received: from mabock-mobl2.amr.corp.intel.com (HELO panetone.amr.corp.intel.com) ([10.254.178.24]) by FMSMGA003.fm.intel.com with ESMTP; 24 Mar 2016 12:16:17 -0700 From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Thu, 24 Mar 2016 16:16:08 -0300 Message-Id: <1458846972-20338-2-git-send-email-paulo.r.zanoni@intel.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1458846972-20338-1-git-send-email-paulo.r.zanoni@intel.com> References: <1458846972-20338-1-git-send-email-paulo.r.zanoni@intel.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 1/4] drm/i915/fbc: update busy_bits even for GTT and flip flushes X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We ignore ORIGIN_GTT because the hardware tracking can recognize GTT writes and take care of them. We also ignore ORIGIN_FLIP because we deal with flips without relying on the frontbuffer tracking infrastructure. On the other hand, a flush is a flush and means we're good to go, so we need to update busy_bits in order to reflect that, even if we're not going to do anything else about it. How to reproduce the bug fixed by this patch: - boot SKL up to the desktop environment - stop the display manager - run any of the igt/kms_frontbuffer_tracking/*fbc*onoff* subtests - the tests will fail The steps above will create the right conditions for us to lose track of busy_bits. If you, for example, run the full set of FBC tests, the onoff subtests will succeed. Also notice that the "bug" is that we'll just keep FBC disabled on cases where it could be enabled, so it's not something the users can perceive, it just affects power consumption numbers on properly configured machines. Testcase: igt/kms_frontbuffer_tracking/*fbc*onoff* (see above) Reviewed-by: Daniel Vetter Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_fbc.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c index 2e571f5..b8ba79c 100644 --- a/drivers/gpu/drm/i915/intel_fbc.c +++ b/drivers/gpu/drm/i915/intel_fbc.c @@ -996,13 +996,13 @@ void intel_fbc_flush(struct drm_i915_private *dev_priv, if (!fbc_supported(dev_priv)) return; - if (origin == ORIGIN_GTT || origin == ORIGIN_FLIP) - return; - mutex_lock(&fbc->lock); fbc->busy_bits &= ~frontbuffer_bits; + if (origin == ORIGIN_GTT || origin == ORIGIN_FLIP) + goto out; + if (!fbc->busy_bits && fbc->enabled && (frontbuffer_bits & intel_fbc_get_frontbuffer_bit(fbc))) { if (fbc->active) @@ -1011,6 +1011,7 @@ void intel_fbc_flush(struct drm_i915_private *dev_priv, __intel_fbc_post_update(fbc->crtc); } +out: mutex_unlock(&fbc->lock); }