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[5.69.116.138]) by smtp.gmail.com with ESMTPSA id t8sm24599519wjy.41.2016.04.03.09.51.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 03 Apr 2016 09:51:53 -0700 (PDT) From: Eric Engestrom To: intel-gfx@lists.freedesktop.org Date: Sun, 3 Apr 2016 17:35:30 +0100 Message-Id: <1459701330-2263-5-git-send-email-eric@engestrom.ch> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1459701330-2263-1-git-send-email-eric@engestrom.ch> References: <1459701330-2263-1-git-send-email-eric@engestrom.ch> X-Mailman-Approved-At: Mon, 04 Apr 2016 08:27:43 +0000 Cc: Eric Engestrom Subject: [Intel-gfx] [PATCH i-g-t 5/5] tools: fix spelling mistakes X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Eric Engestrom --- tools/intel_audio_dump.c | 14 +++++++------- tools/intel_bios.h | 6 +++--- tools/intel_display_poller.c | 2 +- tools/intel_dump_decode.c | 2 +- tools/intel_opregion_decode.c | 2 +- tools/null_state_gen/intel_renderstate_gen7.c | 2 +- tools/null_state_gen/intel_renderstate_gen8.c | 2 +- tools/null_state_gen/intel_renderstate_gen9.c | 2 +- 8 files changed, 16 insertions(+), 16 deletions(-) diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c index 8c24230..be6a1ea 100644 --- a/tools/intel_audio_dump.c +++ b/tools/intel_audio_dump.c @@ -318,8 +318,8 @@ static const char * const dis_eld_valid_pulse_trans[] = { }; static const char * const dis_pd_pulse_trans[] = { - [0] = "Enable Presense Detect pulse transition when unsol is disabled", - [1] = "Disable Presense Detect pulse transition when unsol is disabled", + [0] = "Enable Presence Detect pulse transition when unsol is disabled", + [1] = "Disable Presence Detect pulse transition when unsol is disabled", }; static const char * const dis_ts_delta_err[] = { @@ -2154,11 +2154,11 @@ static void dump_hsw_plus(void) dump_reg(DISPLAY_HOTPLUG_CTL, "display hotplug control"); /* HSW DDI Buffer */ - dump_reg(DDI_BUF_CTL_A, "DDI Buffer Controler A"); - dump_reg(DDI_BUF_CTL_B, "DDI Buffer Controler B"); - dump_reg(DDI_BUF_CTL_C, "DDI Buffer Controler C"); - dump_reg(DDI_BUF_CTL_D, "DDI Buffer Controler D"); - dump_reg(DDI_BUF_CTL_E, "DDI Buffer Controler E"); + dump_reg(DDI_BUF_CTL_A, "DDI Buffer Controller A"); + dump_reg(DDI_BUF_CTL_B, "DDI Buffer Controller B"); + dump_reg(DDI_BUF_CTL_C, "DDI Buffer Controller C"); + dump_reg(DDI_BUF_CTL_D, "DDI Buffer Controller D"); + dump_reg(DDI_BUF_CTL_E, "DDI Buffer Controller E"); /* HSW Pipe Function */ dump_reg(PIPE_CONF_A, "PIPE Configuration A"); diff --git a/tools/intel_bios.h b/tools/intel_bios.h index b7ebd48..288cb56 100644 --- a/tools/intel_bios.h +++ b/tools/intel_bios.h @@ -796,16 +796,16 @@ enum mipi_seq_element { * GR18 & SWF*. * * The VBIOS/firmware will signal to the gfx driver through the ASLE interrupt - * (visible in the interupt regs at bit 0) when it wants something done. + * (visible in the interrupt regs at bit 0) when it wants something done. * * Pre-965: * The gfx driver can make calls to the VBIOS/firmware through an SMI request, * generated by writing to offset 0xe0 of the device's config space (see the - * publically available 915 PRM for details). + * publicly available 915 PRM for details). * * 965 and above: * IGD OpRegion requests to the VBIOS/firmware are made using SWSCI, which can - * be triggered by writing to offset 0xe4 (see the publically available + * be triggered by writing to offset 0xe4 (see the publicly available * 965 graphics PRM for details). */ diff --git a/tools/intel_display_poller.c b/tools/intel_display_poller.c index eab17c5..9460358 100644 --- a/tools/intel_display_poller.c +++ b/tools/intel_display_poller.c @@ -1051,7 +1051,7 @@ int main(int argc, char *argv[]) /* * check if the requires registers are - * avilable on the current platform. + * available on the current platform. */ if (IS_GEN2(devid)) { if (pipe > 1) diff --git a/tools/intel_dump_decode.c b/tools/intel_dump_decode.c index 0341aad..c20f5b6 100644 --- a/tools/intel_dump_decode.c +++ b/tools/intel_dump_decode.c @@ -185,7 +185,7 @@ main (int argc, char *argv[]) binary = 0; break; default: - printf("unkown command options\n"); + printf("unknown command options\n"); break; } } diff --git a/tools/intel_opregion_decode.c b/tools/intel_opregion_decode.c index c65828a..d228d30 100644 --- a/tools/intel_opregion_decode.c +++ b/tools/intel_opregion_decode.c @@ -404,7 +404,7 @@ int main(int argc, char *argv[]) filename = optarg; break; default: - fprintf(stderr, "unkown command options\n"); + fprintf(stderr, "unknown command options\n"); return 1; } } diff --git a/tools/null_state_gen/intel_renderstate_gen7.c b/tools/null_state_gen/intel_renderstate_gen7.c index df20bc2..6b2850f 100644 --- a/tools/null_state_gen/intel_renderstate_gen7.c +++ b/tools/null_state_gen/intel_renderstate_gen7.c @@ -131,7 +131,7 @@ static void gen7_emit_drawing_rectangle(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_DRAWING_RECTANGLE | (4 - 2)); - /* Purposedly set min > max for null rectangle */ + /* Purposely set min > max for null rectangle */ OUT_BATCH(0xffffffff); OUT_BATCH(0 | 0); OUT_BATCH(0); diff --git a/tools/null_state_gen/intel_renderstate_gen8.c b/tools/null_state_gen/intel_renderstate_gen8.c index 6a309d4..b3a9be0 100644 --- a/tools/null_state_gen/intel_renderstate_gen8.c +++ b/tools/null_state_gen/intel_renderstate_gen8.c @@ -183,7 +183,7 @@ static void gen8_emit_state_base_address(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_STATE_SIZE_PAGES(1) | BUFFER_SIZE_MODIFY); /* indirect object buffer size */ OUT_BATCH(0 | BUFFER_SIZE_MODIFY); - /* intruction buffer size */ + /* instruction buffer size */ OUT_BATCH(GEN8_STATE_SIZE_PAGES(1) | BUFFER_SIZE_MODIFY); } diff --git a/tools/null_state_gen/intel_renderstate_gen9.c b/tools/null_state_gen/intel_renderstate_gen9.c index a0b7d8a..2671876 100644 --- a/tools/null_state_gen/intel_renderstate_gen9.c +++ b/tools/null_state_gen/intel_renderstate_gen9.c @@ -328,7 +328,7 @@ static void gen9_emit_state_base_address(struct intel_batchbuffer *batch) { OUT_BATCH(GEN8_STATE_SIZE_PAGES(1) | BUFFER_SIZE_MODIFY); /* indirect object buffer size */ OUT_BATCH(0x0 | BUFFER_SIZE_MODIFY); - /* intruction buffer size */ + /* instruction buffer size */ OUT_BATCH(GEN8_STATE_SIZE_PAGES(1) | BUFFER_SIZE_MODIFY); /* bindless surface state base address */