diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 9464ba3..4d0c39d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5515,6 +5515,10 @@ enum skl_disp_power_wells {
 #define PLANE_KEYMAX(pipe, plane)	\
 	_MMIO_PLANE(plane, _PLANE_KEYMAX_1(pipe), _PLANE_KEYMAX_2(pipe))
 
+#define PLANE_KEYMAX_ALPHA_MASK			0x00ffffff
+#define PLANE_KEY_MASK_ALPHA_EN			31
+#define PLANE_KEY_MAX_ALPHA_SHIFT		24
+
 #define _PLANE_BUF_CFG_1_B			0x7127c
 #define _PLANE_BUF_CFG_2_B			0x7137c
 #define _PLANE_BUF_CFG_1(pipe)	\
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 037407f..31755f2 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3032,6 +3032,8 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
 	struct drm_framebuffer *fb = plane_state->base.fb;
 	struct drm_i915_gem_object *obj = intel_fb_obj(fb);
+	const struct drm_intel_sprite_colorkey *key =
+			&to_intel_plane_state(plane->state)->ckey;
 	int pipe = intel_crtc->pipe;
 	u32 plane_ctl, stride_div, stride;
 	u32 tile_height, plane_offset, plane_size;
@@ -3064,6 +3066,15 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
 
 	WARN_ON(drm_rect_width(&plane_state->src) == 0);
 
+	I915_WRITE(PLANE_KEYMAX(pipe, 0), (DRM_MODE_COLOR_ALPHA_8
+			(plane_state->base.blend_mode.color)
+				<< PLANE_KEY_MAX_ALPHA_SHIFT) |
+			(key->max_value & PLANE_KEYMAX_ALPHA_MASK));
+	I915_WRITE(PLANE_KEYMSK(pipe, 0),
+			(plane_state->use_plane_alpha
+				<< PLANE_KEY_MASK_ALPHA_EN) |
+			(key->channel_mask & GENMASK(0, 26)));
+
 	if (intel_rotation_90_or_270(rotation)) {
 		int cpp = drm_format_plane_cpp(fb->pixel_format, 0);
 
@@ -3146,6 +3157,7 @@ static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
 	case DRM_BLEND_FUNC(AUTO, AUTO):
 		if (has_per_pixel_blending)
 			state->per_pixel_alpha = PRE_MULTIPLIED_ALPHA;
+		state->use_plane_alpha = false;
 		break;
 	/* fbs without an alpha channel, or dropping the alpha channel */
 	case DRM_BLEND_FUNC(ONE, ZERO):
@@ -3158,6 +3170,7 @@ static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
 			state->per_pixel_alpha = DROP_ALPHA;
 		else
 			state->per_pixel_alpha = PRE_MULTIPLIED_ALPHA;
+		state->use_plane_alpha = false;
 		break;
 	/* non pre-multiplied alpha */
 	case DRM_BLEND_FUNC(SRC_ALPHA, ONE_MINUS_SRC_ALPHA):
@@ -3165,6 +3178,34 @@ static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
 			state->per_pixel_alpha = DROP_ALPHA;
 		else
 			state->per_pixel_alpha = NON_PRE_MULTIPLIED_ALPHA;
+		state->use_plane_alpha = false;
+		break;
+	/* plane alpha */
+	case DRM_BLEND_FUNC(CONSTANT_ALPHA, ONE_MINUS_CONSTANT_ALPHA):
+		state->use_plane_alpha = true;
+		break;
+	/* plane alpha, pre-multiplied fb */
+	case DRM_BLEND_FUNC(CONSTANT_ALPHA,
+			    ONE_MINUS_CONSTANT_ALPHA_TIMES_SRC_ALPHA):
+		if (!has_per_pixel_blending)
+			state->per_pixel_alpha = DROP_ALPHA;
+		else
+			state->per_pixel_alpha = PRE_MULTIPLIED_ALPHA;
+		/*TBD bspec check*/
+		state->use_plane_alpha = true;
+		break;
+	/* plane alpha, non pre-multiplied fb */
+	case DRM_BLEND_FUNC(CONSTANT_ALPHA_TIMES_SRC_ALPHA,
+			    ONE_MINUS_CONSTANT_ALPHA_TIMES_SRC_ALPHA):
+		if (!has_per_pixel_blending)
+			state->per_pixel_alpha = DROP_ALPHA;
+		else
+			state->per_pixel_alpha = NON_PRE_MULTIPLIED_ALPHA;
+		state->use_plane_alpha = true;
+		break;
+	/* drop plane alpha */
+	case DRM_BLEND_FUNC(ZERO, ONE):
+		state->use_plane_alpha = false;
 		break;
 	default:
 		return -EINVAL;
@@ -14228,6 +14269,12 @@ void intel_plane_add_blend_properties(struct intel_plane *plane)
 	if (prop)
 		drm_object_attach_property(&plane->base.base, prop,
 					   DRM_BLEND_FUNC(AUTO, AUTO));
+
+	prop = dev->mode_config.prop_blend_color;
+	if (prop)
+		drm_object_attach_property(&plane->base.base, prop,
+					   DRM_MODE_COLOR(0xffff, 0xffff,
+							  0xffff, 0xffff));
 }
 
 static int
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 1939440..d3cb36f 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -341,6 +341,9 @@ struct intel_plane_state {
 	/* per pixel alpha channel state */
 	enum per_pixel_alpha_state per_pixel_alpha;
 
+	/* use per-plane alpha */
+	bool use_plane_alpha;
+
 	/* async flip related structures */
 	struct drm_i915_gem_request *wait_req;
 };
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 9474b76..851c09a 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -226,10 +226,15 @@ skl_update_plane(struct drm_plane *drm_plane,
 	crtc_w--;
 	crtc_h--;
 
+	I915_WRITE(PLANE_KEYMAX(pipe, plane),
+		   (DRM_MODE_COLOR_ALPHA_8(plane_state->base.blend_mode.color)
+			<< 24) | (key->max_value & 0x00ffffff));
+	I915_WRITE(PLANE_KEYMSK(pipe, plane),
+		   (plane_state->use_plane_alpha << 31) |
+		   (key->channel_mask & GENMASK(0, 26)));
+
 	if (key->flags) {
 		I915_WRITE(PLANE_KEYVAL(pipe, plane), key->min_value);
-		I915_WRITE(PLANE_KEYMAX(pipe, plane), key->max_value);
-		I915_WRITE(PLANE_KEYMSK(pipe, plane), key->channel_mask);
 	}
 
 	if (key->flags & I915_SET_COLORKEY_DESTINATION)
