From patchwork Tue Apr 26 15:17:52 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthew Auld X-Patchwork-Id: 8939951 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 4E4839F1C1 for ; Tue, 26 Apr 2016 15:18:34 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B5F95200F2 for ; Tue, 26 Apr 2016 15:18:28 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 9FE4F201C7 for ; Tue, 26 Apr 2016 15:18:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7D6C76E2EF; Tue, 26 Apr 2016 15:18:25 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTP id 1C9D26E2EF for ; Tue, 26 Apr 2016 15:18:23 +0000 (UTC) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga104.fm.intel.com with ESMTP; 26 Apr 2016 08:18:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,537,1455004800"; d="scan'208";a="953289222" Received: from unknown (HELO localhost.isw.intel.com) ([10.237.224.82]) by fmsmga001.fm.intel.com with ESMTP; 26 Apr 2016 08:18:22 -0700 From: Matthew Auld To: intel-gfx@lists.freedesktop.org Date: Tue, 26 Apr 2016 16:17:52 +0100 Message-Id: <1461683872-13868-2-git-send-email-matthew.auld@intel.com> X-Mailer: git-send-email 2.4.11 In-Reply-To: <1461683872-13868-1-git-send-email-matthew.auld@intel.com> References: <1461683872-13868-1-git-send-email-matthew.auld@intel.com> Subject: [Intel-gfx] [PATCH 2/2] drm/i915: generate address mode bit from PPGTT instance X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: "Wang, Zhi A" After the per-PPGTT address mode gets support, the LRC submission should generate the address mode bit from PPGTT instance, instead of the hard-coded system configuration. v2: (Matthew Auld) - rebase on latest -nightly Cc: Chris Wilson Cc: Joonas Lahtinen Signed-off-by: Matthew Auld Signed-off-by: Zhi Wang --- drivers/gpu/drm/i915/intel_lrc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 13cb1b3..17bd811 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -214,7 +214,7 @@ enum { LEGACY_64B_CONTEXT }; #define GEN8_CTX_ADDRESSING_MODE_SHIFT 3 -#define GEN8_CTX_ADDRESSING_MODE(dev) (USES_FULL_48BIT_PPGTT(dev) ?\ +#define GEN8_CTX_ADDRESSING_MODE(ppgtt) (IS_48BIT_PPGTT(ppgtt) ? \ LEGACY_64B_CONTEXT :\ LEGACY_32B_CONTEXT) enum { @@ -276,8 +276,6 @@ logical_ring_init_platform_invariants(struct intel_engine_cs *engine) (engine->id == VCS || engine->id == VCS2); engine->ctx_desc_template = GEN8_CTX_VALID; - engine->ctx_desc_template |= GEN8_CTX_ADDRESSING_MODE(dev) << - GEN8_CTX_ADDRESSING_MODE_SHIFT; if (IS_GEN8(dev)) engine->ctx_desc_template |= GEN8_CTX_L3LLC_COHERENT; engine->ctx_desc_template |= GEN8_CTX_PRIVILEGE; @@ -319,7 +317,9 @@ intel_lr_context_descriptor_update(struct intel_context *ctx, lrca = ctx->engine[engine->id].lrc_vma->node.start + LRC_PPHWSP_PN * PAGE_SIZE; - desc = engine->ctx_desc_template; /* bits 0-11 */ + desc = engine->ctx_desc_template; /* bits 0-11 */ + desc |= GEN8_CTX_ADDRESSING_MODE(ctx->ppgtt) << /* bits 3-4 */ + GEN8_CTX_ADDRESSING_MODE_SHIFT; desc |= lrca; /* bits 12-31 */ desc |= (lrca >> PAGE_SHIFT) << GEN8_CTX_ID_SHIFT; /* bits 32-51 */