From patchwork Thu Jun 2 16:36:20 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Wang, Zhi A" X-Patchwork-Id: 9150905 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9F31760221 for ; Thu, 2 Jun 2016 16:39:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 907A128319 for ; Thu, 2 Jun 2016 16:39:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 855DF28326; Thu, 2 Jun 2016 16:39:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0DDF828319 for ; Thu, 2 Jun 2016 16:39:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 113116EB3A; Thu, 2 Jun 2016 16:39:33 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id DAE826E8E6 for ; Thu, 2 Jun 2016 16:39:28 +0000 (UTC) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga103.jf.intel.com with ESMTP; 02 Jun 2016 09:39:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.26,407,1459839600"; d="scan'208";a="820370370" Received: from zhiwang1-mobl4.ccr.corp.intel.com (HELO inno-VirtualBox.fi.intel.com) ([10.237.66.146]) by orsmga003.jf.intel.com with ESMTP; 02 Jun 2016 09:39:26 -0700 From: Zhi Wang To: intel-gfx@lists.freedesktop.org, tvrtko.ursulin@linux.intel.com, joonas.lahtinen@linux.intel.com, kevin.tian@intel.com, zhiyuan.lv@intel.com, chris@chris-wilson.co.uk Date: Thu, 2 Jun 2016 12:36:20 -0400 Message-Id: <1464885380-7056-10-git-send-email-zhi.a.wang@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1464885380-7056-1-git-send-email-zhi.a.wang@intel.com> References: <1464885380-7056-1-git-send-email-zhi.a.wang@intel.com> Subject: [Intel-gfx] [PATCH v6 9/9] drm/i915: Introduce GVT context creation API X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP GVT workload scheduler needs special host LRC contexts, the so called "shadow LRC context" to submit guest workload to host i915. During the guest workload submission, GVT fills the shadow LRC context with the content of guest LRC context: engine context is copied without changes, ring context is mostly owned by host i915. The GVT-g workload scheduler flow: +-----------+ +-----------+ | GVT Guest | | GVT Guest | +-+-----^---+ +-+-----^---+ | | | | | | GVT-g | | GVT-g vELSP write| | emulates vELSP write| | emulates | | Execlist/CSB | | Execlist/CSB | | Status | | Status | | | | +------v-----+-------------------------v-----+---------+ | GVT Virtual Execlist Submission | +------+-------------------------------+---------------+ | | | Per-VM/Ring Workoad Q | Per-VM/Ring Workload Q +---------------------+--+ +------------------------+ +---v--------+ ^ +---v--------+ |GVT Workload|... | |GVT Workload|... +------------+ | +------------+ | | Pick Workload from Q +--------------------+---------------------------------+ | GVT Workload Scheduler | +--------------------+---------------------------------+ | * Shadow guest LRC context +------v------+ * Shadow guest ring buffer | GVT Context | * Scan/Patch guest RB instructions +------+------+ | v Host i915 GEM Submission v6: - Make GVT code as dead code when !CONFIG_DRM_I915_GVT. (Chris) v5: - Only compile this feature when CONFIG_DRM_I915_GVT is enabled. (Tvrtko) - Rebase the code into new repo. - Add a comment about the ring buffer size. (Joonas) v2: Mostly based on Daniel's idea. Call the refactored core logic of GEM context creation service and LRC context creation service to create the GVT context. Signed-off-by: Zhi Wang --- drivers/gpu/drm/i915/i915_gem_context.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index d9d7779..c0259d7 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c @@ -342,6 +342,38 @@ i915_gem_create_context(struct drm_device *dev, return ctx; } +/** + * i915_gem_create_gvt_context - create a GVT GEM context + * @dev: drm device * + * + * This function is used to create a GVT specific GEM context. + * + * Returns: + * pointer to i915_gem_context on success, error pointer if failed + * + */ +struct i915_gem_context * +i915_gem_create_gvt_context(struct drm_device *dev) +{ + struct i915_gem_context *ctx; + + if (!IS_ENABLED(CONFIG_DRM_I915_GVT)) + return ERR_PTR(-ENODEV); + + mutex_lock(&dev->struct_mutex); + + ctx = i915_gem_create_context(dev, NULL); + if (IS_ERR(ctx)) + goto out; + + ctx->enable_lrc_status_change_notification = true; + ctx->enable_lrc_single_submission = true; + ctx->lrc_ring_buffer_size = 512 * PAGE_SIZE; /* Max ring buffer size */ +out: + mutex_unlock(&dev->struct_mutex); + return ctx; +} + static void i915_gem_context_unpin(struct i915_gem_context *ctx, struct intel_engine_cs *engine) {