Message ID | 1465312727-2211-11-git-send-email-zhi.a.wang@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Tue, Jun 07, 2016 at 11:18:46AM -0400, Zhi Wang wrote: > This patch introduces the support of LRC context single submission. > As GVT context may come from different guests, which require different > configuration of render registers. It can't be combined into a dual ELSP > submission combo. > > Only GVT-g will create this kinds of GEM context currently. > > v7: > > - Fix typos in commit message. (Joonas) > > v6: > - Make GVT code as dead code when !CONFIG_DRM_I915_GVT. (Chris) > > v5: > > - Only compile this feature when CONFIG_DRM_I915_GVT=y. (Tvrtko) > > Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 1 + > drivers/gpu/drm/i915/intel_lrc.c | 15 +++++++++++++++ > 2 files changed, 16 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 4ab4cf7..8f8a5bc 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -882,6 +882,7 @@ struct i915_gem_context { > u32 lrc_addressing_mode_bits; > struct atomic_notifier_head status_notifier; > bool enable_lrc_status_change_notification; > + bool enable_lrc_single_submission; > > struct list_head link; > > diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c > index 956585d..e3cab06 100644 > --- a/drivers/gpu/drm/i915/intel_lrc.c > +++ b/drivers/gpu/drm/i915/intel_lrc.c > @@ -447,6 +447,21 @@ static void execlists_context_unqueue(struct intel_engine_cs *engine) > i915_gem_request_unreference(req0); > req0 = cursor; > } else { > + /* Compiler will do the dead-code elimination */ > + if (IS_ENABLED(CONFIG_DRM_I915_GVT)) { > + /* > + * req0 (after merged) ctx requires single > + * submission, stop picking > + */ > + if (req0->ctx->enable_lrc_single_submission) enable_ is a bad verb here, force_ would be more apt. s/lrc/execlists/ ctx->execlists_force_single_submission -Chris
On ke, 2016-06-08 at 08:04 +0100, Chris Wilson wrote: > On Tue, Jun 07, 2016 at 11:18:46AM -0400, Zhi Wang wrote: > > > > This patch introduces the support of LRC context single submission. > > As GVT context may come from different guests, which require different > > configuration of render registers. It can't be combined into a dual ELSP > > submission combo. > > > > Only GVT-g will create this kinds of GEM context currently. > > > > v7: > > > > - Fix typos in commit message. (Joonas) > > > > v6: > > - Make GVT code as dead code when !CONFIG_DRM_I915_GVT. (Chris) > > > > v5: > > > > - Only compile this feature when CONFIG_DRM_I915_GVT=y. (Tvrtko) > > > > Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> > > --- > > drivers/gpu/drm/i915/i915_drv.h | 1 + > > drivers/gpu/drm/i915/intel_lrc.c | 15 +++++++++++++++ > > 2 files changed, 16 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > > index 4ab4cf7..8f8a5bc 100644 > > --- a/drivers/gpu/drm/i915/i915_drv.h > > +++ b/drivers/gpu/drm/i915/i915_drv.h > > @@ -882,6 +882,7 @@ struct i915_gem_context { > > u32 lrc_addressing_mode_bits; > > struct atomic_notifier_head status_notifier; > > bool enable_lrc_status_change_notification; > > + bool enable_lrc_single_submission; > > > > struct list_head link; > > > > diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c > > index 956585d..e3cab06 100644 > > --- a/drivers/gpu/drm/i915/intel_lrc.c > > +++ b/drivers/gpu/drm/i915/intel_lrc.c > > @@ -447,6 +447,21 @@ static void execlists_context_unqueue(struct intel_engine_cs *engine) > > i915_gem_request_unreference(req0); > > req0 = cursor; > > } else { > > + /* Compiler will do the dead-code elimination */ > > + if (IS_ENABLED(CONFIG_DRM_I915_GVT)) { > > + /* > > + * req0 (after merged) ctx requires single > > + * submission, stop picking > > + */ > > + if (req0->ctx->enable_lrc_single_submission) > enable_ is a bad verb here, force_ would be more apt. > > s/lrc/execlists/ > > ctx->execlists_force_single_submission > -Chris Also CCing Kevin here, who commented on the previous patch. I still think it would be good to do the req0->{vgpu,vmid} != cursor- >{vgpu,vmid} test. That way, we get better results if there's one dominating VM submitting workloads, right? Regards, Joonas >
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 4ab4cf7..8f8a5bc 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -882,6 +882,7 @@ struct i915_gem_context { u32 lrc_addressing_mode_bits; struct atomic_notifier_head status_notifier; bool enable_lrc_status_change_notification; + bool enable_lrc_single_submission; struct list_head link; diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 956585d..e3cab06 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -447,6 +447,21 @@ static void execlists_context_unqueue(struct intel_engine_cs *engine) i915_gem_request_unreference(req0); req0 = cursor; } else { + /* Compiler will do the dead-code elimination */ + if (IS_ENABLED(CONFIG_DRM_I915_GVT)) { + /* + * req0 (after merged) ctx requires single + * submission, stop picking + */ + if (req0->ctx->enable_lrc_single_submission) + break; + /* + * req0 ctx doesn't require single submission, + * but next req ctx requires, stop picking + */ + if (cursor->ctx->enable_lrc_single_submission) + break; + } req1 = cursor; WARN_ON(req1->elsp_submitted); break;
This patch introduces the support of LRC context single submission. As GVT context may come from different guests, which require different configuration of render registers. It can't be combined into a dual ELSP submission combo. Only GVT-g will create this kinds of GEM context currently. v7: - Fix typos in commit message. (Joonas) v6: - Make GVT code as dead code when !CONFIG_DRM_I915_GVT. (Chris) v5: - Only compile this feature when CONFIG_DRM_I915_GVT=y. (Tvrtko) Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_lrc.c | 15 +++++++++++++++ 2 files changed, 16 insertions(+)