From patchwork Fri Jun 10 12:28:01 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kahola X-Patchwork-Id: 9169625 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 34AD7604DB for ; Fri, 10 Jun 2016 12:28:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 260A620700 for ; Fri, 10 Jun 2016 12:28:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1AEE52833F; Fri, 10 Jun 2016 12:28:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D14BE20700 for ; Fri, 10 Jun 2016 12:28:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BF5CA6ED29; Fri, 10 Jun 2016 12:28:39 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id 4E18E6ED31; Fri, 10 Jun 2016 12:28:19 +0000 (UTC) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga103.jf.intel.com with ESMTP; 10 Jun 2016 05:28:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.26,449,1459839600"; d="scan'208";a="994991469" Received: from sorvi.fi.intel.com ([10.237.72.50]) by orsmga002.jf.intel.com with ESMTP; 10 Jun 2016 05:28:17 -0700 From: Mika Kahola To: dri-devel@lists.freedesktop.org Date: Fri, 10 Jun 2016 15:28:01 +0300 Message-Id: <1465561685-3939-7-git-send-email-mika.kahola@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1465561685-3939-1-git-send-email-mika.kahola@intel.com> References: <1465561685-3939-1-git-send-email-mika.kahola@intel.com> Cc: intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [PATCH v5 06/10] drm: Read DP branch device HW revision X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP HW revision is mandatory field for DisplayPort branch devices. This is defined in DPCD register field 0x509. Signed-off-by: Mika Kahola --- drivers/gpu/drm/drm_dp_helper.c | 21 +++++++++++++++++++++ include/drm/drm_dp_helper.h | 7 +++++++ 2 files changed, 28 insertions(+) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index 0c83685..b5ae189 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -514,6 +514,27 @@ int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE], EXPORT_SYMBOL(drm_dp_downstream_max_bpc); /** + * drm_dp_downstream_hw_rev() - read DP branch device HW revision + * @aux: DisplayPort AUX channel + * + * Returns HW revision on succes or negative error code on failure + */ +struct drm_dp_revision drm_dp_downstream_hw_rev(struct drm_dp_aux *aux) +{ + uint8_t tmp; + struct drm_dp_revision rev = { .major = -EINVAL, .minor = -EINVAL }; + + if (drm_dp_dpcd_read(aux, DP_BRANCH_HW_REV, &tmp, 1) != 1) + return rev; + + rev.major = (tmp & 0xf0) >> 4; + rev.minor = tmp & 0xf; + + return rev; +} +EXPORT_SYMBOL(drm_dp_downstream_hw_rev); + +/** * drm_dp_downstream_id() - identify branch device * @aux: DisplayPort AUX channel * diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 88bf3bf..641bf3d 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -446,6 +446,7 @@ #define DP_SINK_OUI 0x400 #define DP_BRANCH_OUI 0x500 #define DP_BRANCH_ID 0x503 +#define DP_BRANCH_HW_REV 0x509 #define DP_SET_POWER 0x600 # define DP_SET_POWER_D0 0x1 @@ -803,6 +804,11 @@ struct drm_dp_link { unsigned long capabilities; }; +struct drm_dp_revision { + int major; + int minor; +}; + int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link); int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link); int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link); @@ -812,6 +818,7 @@ int drm_dp_downstream_max_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE], int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4]); int drm_dp_downstream_id(struct drm_dp_aux *aux, char id[6]); +struct drm_dp_revision drm_dp_downstream_hw_rev(struct drm_dp_aux *aux); int drm_dp_aux_register(struct drm_dp_aux *aux); void drm_dp_aux_unregister(struct drm_dp_aux *aux);