From patchwork Fri Jun 17 13:42:39 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Gordon X-Patchwork-Id: 9184023 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C6A0E608A2 for ; Fri, 17 Jun 2016 13:42:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B60E128380 for ; Fri, 17 Jun 2016 13:42:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AAEDB28396; Fri, 17 Jun 2016 13:42:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 537AC28380 for ; Fri, 17 Jun 2016 13:42:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7B5F76EC1A; Fri, 17 Jun 2016 13:42:44 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 410BF6EC1A for ; Fri, 17 Jun 2016 13:42:43 +0000 (UTC) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP; 17 Jun 2016 06:42:44 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.26,483,1459839600"; d="scan'208"; a="1004309728" Received: from dsgordon-linux2.isw.intel.com ([10.102.226.88]) by fmsmga002.fm.intel.com with ESMTP; 17 Jun 2016 06:42:41 -0700 From: Dave Gordon To: intel-gfx@lists.freedesktop.org Date: Fri, 17 Jun 2016 14:42:39 +0100 Message-Id: <1466170959-4062-1-git-send-email-david.s.gordon@intel.com> X-Mailer: git-send-email 1.9.1 Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Cc: Harsh Chheda Subject: [Intel-gfx] [PATCH] drm/i915/guc: make forwarding of VBlanks conditional X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Apparently we shouldn't forward VBlanks to the GuC unconditionally, as it may trigger a race condition in the GuC's internal dispatcher. From an internal message from Harsh Chheda > > If the context has switched out the [GuC] scheduler should know so > that it can put the context in wait state and schedule something > else. If the context which is waiting on Vblank is still on the CS > then [the GuC] scheduler does not need to know. If in this case wait > on Vblank is sent to Guc while the context is still on CS there is > an edge condition when the Vblank may get satisfied right after > sending interrupt to guc and context may complete. Scheduler will > then incorrectly mark the context to be in wait state. So we need to change this register setting to GFX_FORWARD_VBLANK_COND. Signed-off-by: Dave Gordon Cc: Harsh Chheda --- drivers/gpu/drm/i915/intel_guc_loader.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c index 8fe96a2..af9f51e 100644 --- a/drivers/gpu/drm/i915/intel_guc_loader.c +++ b/drivers/gpu/drm/i915/intel_guc_loader.c @@ -106,7 +106,7 @@ static void direct_interrupts_to_guc(struct drm_i915_private *dev_priv) u32 tmp; /* tell all command streamers to forward interrupts and vblank to GuC */ - irqs = _MASKED_FIELD(GFX_FORWARD_VBLANK_MASK, GFX_FORWARD_VBLANK_ALWAYS); + irqs = _MASKED_FIELD(GFX_FORWARD_VBLANK_MASK, GFX_FORWARD_VBLANK_COND); irqs |= _MASKED_BIT_ENABLE(GFX_INTERRUPT_STEERING); for_each_engine(engine, dev_priv) I915_WRITE(RING_MODE_GEN7(engine), irqs);