| Message ID | 1467485491-17247-2-git-send-email-akash.goel@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 02/07/16 19:51, akash.goel@intel.com wrote: > From: Sagar Arun Kamble <sagar.a.kamble@intel.com> > > The first page of the GuC log buffer contains state info or meta data > which is required to parse the logs contained in the subsequent pages. > The structure representing the state info is added to interface file > as Driver would need to handle log buffer flush interrupts from GuC. > Added an enum for the different message/event types that can be send > by the GuC ukernel to Host. > Also added 2 new Host to GuC action types to inform GuC when Host has > flushed the log buffer and forcefuly cause the GuC to send a new > log buffer flush interrupt. > > v2: Make documentation of log buffer state structure more elaborate. (Tvrtko) > Rename LOGBUFFERFLUSH action to LOG_BUFFER_FLUSH for consistency. (Tvrtko) > > Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> > Signed-off-by: Akash Goel <akash.goel@intel.com> > --- > drivers/gpu/drm/i915/intel_guc_fwif.h | 64 +++++++++++++++++++++++++++++++++++ > 1 file changed, 64 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h b/drivers/gpu/drm/i915/intel_guc_fwif.h > index 944786d..ad916b5 100644 > --- a/drivers/gpu/drm/i915/intel_guc_fwif.h > +++ b/drivers/gpu/drm/i915/intel_guc_fwif.h > @@ -418,15 +418,73 @@ struct guc_ads { > u32 reserved2[4]; > } __packed; > > +/* GuC logging structures */ > + > +enum guc_log_buffer_type { > + GUC_ISR_LOG_BUFFER, > + GUC_DPC_LOG_BUFFER, > + GUC_CRASH_DUMP_LOG_BUFFER, > + GUC_MAX_LOG_BUFFER > +}; > + > +/* > + * Below state is used for coordination of retrieval of GuC firmware logs. > + * read_ptr points to the location where i915 read last in log buffer and > + * read only for GuC firmware. write_ptr is incremented by GuC with number is read-only > + * of bytes written for each log entry and is read only for i915. > + * When the log buffer becomes half full, GuC sends a flush interrupt. > + * GuC firmware expects that while it is writing to 2nd half of the buffer, > + * first half would get consumed by Host and then get a flush completed > + * acknowledgement from Host, so that it does not end up doing any overwrite > + * causing loss of logs. So when buffer gets half filled & i915 has requested > + * for interrupt, GuC will set flush_to_file field, set the sampled_write_ptr > + * to the value of write_ptr and raise the interrupt. > + * On receving the interrupt i915 should read the buffer, clear flush_to_file > + * field and also update read_ptr with the value of sample_write_ptr, before > + * sending an acknowledgement to GuC. marker & version fields are for internal > + * usage of GuC and opaque to i915. buffer_full_cnt field is incremented every > + * time GuC detects the log buffer overflow. > + * Separate state is maintained for each log buffer type. > + */ > +struct guc_log_buffer_state { > + u32 marker[2]; > + u32 read_ptr; > + u32 write_ptr; > + u32 size; > + u32 sampled_write_ptr; > + union { > + struct { > + u32 flush_to_file:1; > + u32 buffer_full_cnt:4; > + u32 reserved:27; > + }; > + u32 flags; > + }; > + u32 version; > +} __packed; > + > +union guc_log_control { > + struct { > + u32 logging_enabled:1; > + u32 reserved1:3; > + u32 verbosity:4; > + u32 reserved2:24; > + }; > + u32 value; > +} __packed; > + > /* This Action will be programmed in C180 - SOFT_SCRATCH_O_REG */ > enum host2guc_action { > HOST2GUC_ACTION_DEFAULT = 0x0, > HOST2GUC_ACTION_SAMPLE_FORCEWAKE = 0x6, > HOST2GUC_ACTION_ALLOCATE_DOORBELL = 0x10, > HOST2GUC_ACTION_DEALLOCATE_DOORBELL = 0x20, > + HOST2GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE = 0x30, > + HOST2GUC_ACTION_FORCE_LOG_BUFFER_FLUSH = 0x302, > HOST2GUC_ACTION_ENTER_S_STATE = 0x501, > HOST2GUC_ACTION_EXIT_S_STATE = 0x502, > HOST2GUC_ACTION_SLPC_REQUEST = 0x3003, > + HOST2GUC_ACTION_UK_LOG_ENABLE_LOGGING = 0x0E000, > HOST2GUC_ACTION_LIMIT > }; > > @@ -448,4 +506,10 @@ enum guc2host_status { > GUC2HOST_STATUS_GENERIC_FAIL = GUC2HOST_STATUS(0x0000F000) > }; > > +/* This action will be programmed in C1BC - SOFT_SCRATCH_15_REG */ > +enum guc2host_message { > + GUC2HOST_MSG_CRASH_DUMP_POSTED = (1 << 1), > + GUC2HOST_MSG_FLUSH_LOG_BUFFER = (1 << 3) > +}; > + > #endif > Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Regards, Tvrtko
diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h b/drivers/gpu/drm/i915/intel_guc_fwif.h index 944786d..ad916b5 100644 --- a/drivers/gpu/drm/i915/intel_guc_fwif.h +++ b/drivers/gpu/drm/i915/intel_guc_fwif.h @@ -418,15 +418,73 @@ struct guc_ads { u32 reserved2[4]; } __packed; +/* GuC logging structures */ + +enum guc_log_buffer_type { + GUC_ISR_LOG_BUFFER, + GUC_DPC_LOG_BUFFER, + GUC_CRASH_DUMP_LOG_BUFFER, + GUC_MAX_LOG_BUFFER +}; + +/* + * Below state is used for coordination of retrieval of GuC firmware logs. + * read_ptr points to the location where i915 read last in log buffer and + * read only for GuC firmware. write_ptr is incremented by GuC with number + * of bytes written for each log entry and is read only for i915. + * When the log buffer becomes half full, GuC sends a flush interrupt. + * GuC firmware expects that while it is writing to 2nd half of the buffer, + * first half would get consumed by Host and then get a flush completed + * acknowledgement from Host, so that it does not end up doing any overwrite + * causing loss of logs. So when buffer gets half filled & i915 has requested + * for interrupt, GuC will set flush_to_file field, set the sampled_write_ptr + * to the value of write_ptr and raise the interrupt. + * On receving the interrupt i915 should read the buffer, clear flush_to_file + * field and also update read_ptr with the value of sample_write_ptr, before + * sending an acknowledgement to GuC. marker & version fields are for internal + * usage of GuC and opaque to i915. buffer_full_cnt field is incremented every + * time GuC detects the log buffer overflow. + * Separate state is maintained for each log buffer type. + */ +struct guc_log_buffer_state { + u32 marker[2]; + u32 read_ptr; + u32 write_ptr; + u32 size; + u32 sampled_write_ptr; + union { + struct { + u32 flush_to_file:1; + u32 buffer_full_cnt:4; + u32 reserved:27; + }; + u32 flags; + }; + u32 version; +} __packed; + +union guc_log_control { + struct { + u32 logging_enabled:1; + u32 reserved1:3; + u32 verbosity:4; + u32 reserved2:24; + }; + u32 value; +} __packed; + /* This Action will be programmed in C180 - SOFT_SCRATCH_O_REG */ enum host2guc_action { HOST2GUC_ACTION_DEFAULT = 0x0, HOST2GUC_ACTION_SAMPLE_FORCEWAKE = 0x6, HOST2GUC_ACTION_ALLOCATE_DOORBELL = 0x10, HOST2GUC_ACTION_DEALLOCATE_DOORBELL = 0x20, + HOST2GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE = 0x30, + HOST2GUC_ACTION_FORCE_LOG_BUFFER_FLUSH = 0x302, HOST2GUC_ACTION_ENTER_S_STATE = 0x501, HOST2GUC_ACTION_EXIT_S_STATE = 0x502, HOST2GUC_ACTION_SLPC_REQUEST = 0x3003, + HOST2GUC_ACTION_UK_LOG_ENABLE_LOGGING = 0x0E000, HOST2GUC_ACTION_LIMIT }; @@ -448,4 +506,10 @@ enum guc2host_status { GUC2HOST_STATUS_GENERIC_FAIL = GUC2HOST_STATUS(0x0000F000) }; +/* This action will be programmed in C1BC - SOFT_SCRATCH_15_REG */ +enum guc2host_message { + GUC2HOST_MSG_CRASH_DUMP_POSTED = (1 << 1), + GUC2HOST_MSG_FLUSH_LOG_BUFFER = (1 << 3) +}; + #endif