From patchwork Wed Jul 6 11:04:51 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kahola X-Patchwork-Id: 9216231 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D042F607D9 for ; Wed, 6 Jul 2016 11:05:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C20002882D for ; Wed, 6 Jul 2016 11:05:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B695228832; Wed, 6 Jul 2016 11:05:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D0B112882D for ; Wed, 6 Jul 2016 11:05:22 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2B4E86E639; Wed, 6 Jul 2016 11:05:22 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id 7C9106E639; Wed, 6 Jul 2016 11:05:21 +0000 (UTC) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga103.jf.intel.com with ESMTP; 06 Jul 2016 04:05:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,318,1464678000"; d="scan'208";a="841419695" Received: from sorvi.fi.intel.com ([10.237.72.50]) by orsmga003.jf.intel.com with ESMTP; 06 Jul 2016 04:05:13 -0700 From: Mika Kahola To: dri-devel@lists.freedesktop.org Date: Wed, 6 Jul 2016 14:04:51 +0300 Message-Id: <1467803094-10473-8-git-send-email-mika.kahola@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1467803094-10473-1-git-send-email-mika.kahola@intel.com> References: <1467803094-10473-1-git-send-email-mika.kahola@intel.com> Cc: daniel.vetter@ffwll.ch, intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [PATCH v6 07/10] drm: Read DP branch device SW revision X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP SW revision is mandatory field for DisplayPort branch devices. This is defined in DPCD register field 0x50A. Signed-off-by: Mika Kahola Reviewed-by: Jim Bride --- drivers/gpu/drm/drm_dp_helper.c | 21 +++++++++++++++++++++ include/drm/drm_dp_helper.h | 2 ++ 2 files changed, 23 insertions(+) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index cfd75df..19e06a0 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -535,6 +535,27 @@ struct drm_dp_revision drm_dp_downstream_hw_rev(struct drm_dp_aux *aux) EXPORT_SYMBOL(drm_dp_downstream_hw_rev); /** + * drm_dp_downstream_sw_rev() - read DP branch device SW revision + * @aux: DisplayPort AUX channel + * + * Returns SW revision on success or negative error code on failure + */ +struct drm_dp_revision drm_dp_downstream_sw_rev(struct drm_dp_aux *aux) +{ + uint8_t tmp[2]; + struct drm_dp_revision rev = { .major = -EINVAL, .minor = -EINVAL }; + + if (drm_dp_dpcd_read(aux, DP_BRANCH_SW_REV, tmp, 2) != 2) + return rev; + + rev.major = tmp[0]; + rev.minor = tmp[1]; + + return rev; +} +EXPORT_SYMBOL(drm_dp_downstream_sw_rev); + +/** * drm_dp_downstream_id() - identify branch device * @aux: DisplayPort AUX channel * diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 5f577e4..764a309 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -447,6 +447,7 @@ #define DP_BRANCH_OUI 0x500 #define DP_BRANCH_ID 0x503 #define DP_BRANCH_HW_REV 0x509 +#define DP_BRANCH_SW_REV 0x50A #define DP_SET_POWER 0x600 # define DP_SET_POWER_D0 0x1 @@ -819,6 +820,7 @@ int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4]); int drm_dp_downstream_id(struct drm_dp_aux *aux, char id[6]); struct drm_dp_revision drm_dp_downstream_hw_rev(struct drm_dp_aux *aux); +struct drm_dp_revision drm_dp_downstream_sw_rev(struct drm_dp_aux *aux); void drm_dp_aux_init(struct drm_dp_aux *aux); int drm_dp_aux_register(struct drm_dp_aux *aux);