From patchwork Tue Jul 26 16:40:55 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: arun.siluvery@linux.intel.com X-Patchwork-Id: 9248451 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id ED98E607F2 for ; Tue, 26 Jul 2016 16:42:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DF4AC26A4D for ; Tue, 26 Jul 2016 16:42:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D32A126223; Tue, 26 Jul 2016 16:42:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8FE9126223 for ; Tue, 26 Jul 2016 16:42:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 974356E567; Tue, 26 Jul 2016 16:41:42 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id 0F9AD6E55A for ; Tue, 26 Jul 2016 16:41:37 +0000 (UTC) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga103.jf.intel.com with ESMTP; 26 Jul 2016 09:41:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.28,425,1464678000"; d="scan'208"; a="1014222593" Received: from asiluver-linux.isw.intel.com ([10.102.226.117]) by fmsmga001.fm.intel.com with ESMTP; 26 Jul 2016 09:41:21 -0700 From: Arun Siluvery To: intel-gfx@lists.freedesktop.org Date: Tue, 26 Jul 2016 17:40:55 +0100 Message-Id: <1469551257-26803-10-git-send-email-arun.siluvery@linux.intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1469551257-26803-1-git-send-email-arun.siluvery@linux.intel.com> References: <1469551257-26803-1-git-send-email-arun.siluvery@linux.intel.com> Subject: [Intel-gfx] [PATCH 09/11] drm/i915/tdr: Add engine reset count to error state X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Driver maintains count of how many times a given engine is reset, useful to capture this in error state also. It gives an idea of how engine is coping up with the workloads it is executing before this error state. Signed-off-by: Arun Siluvery --- drivers/gpu/drm/i915/i915_drv.h | 7 +++++++ drivers/gpu/drm/i915/i915_gpu_error.c | 3 +++ 2 files changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index ac7a42c..654bbcc 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -520,6 +520,7 @@ struct drm_i915_error_state { int hangcheck_score; enum intel_ring_hangcheck_action hangcheck_action; int num_requests; + u32 reset_count; /* our own tracking of ring head and tail */ u32 cpu_ring_head; @@ -3232,6 +3233,12 @@ static inline bool i915_engine_reset_in_progress(struct i915_gpu_error *error, return test_bit(engine->id + 1, &error->flags); } +static inline u32 i915_engine_reset_count(struct i915_gpu_error *error, + struct intel_engine_cs *engine) +{ + return READ_ONCE(error->engine_reset_count[engine->id]); +} + void i915_gem_reset(struct drm_device *dev); void i915_gem_reset_engine_status(struct intel_engine_cs *ring); bool i915_gem_clflush_object(struct drm_i915_gem_object *obj, bool force); diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 4d39c72..ea14b4c 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -303,6 +303,7 @@ static void i915_ring_error_state(struct drm_i915_error_state_buf *m, err_printf(m, " hangcheck: %s [%d]\n", hangcheck_action_to_str(ring->hangcheck_action), ring->hangcheck_score); + err_printf(m, " engine reset count: %u\n", ring->reset_count); } void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...) @@ -1022,6 +1023,8 @@ static void i915_record_ring_state(struct drm_i915_private *dev_priv, ering->hangcheck_score = engine->hangcheck.score; ering->hangcheck_action = engine->hangcheck.action; + ering->reset_count = i915_engine_reset_count(&dev_priv->gpu_error, + engine); if (USES_PPGTT(dev_priv)) { int i;