@@ -55,8 +55,8 @@ struct i915_params i915 __read_mostly = {
.verbose_state_checks = 1,
.nuclear_pageflip = 0,
.edp_vswing = 0,
- .enable_guc_loading = 0,
- .enable_guc_submission = 0,
+ .enable_guc_loading = -1,
+ .enable_guc_submission = -1,
.guc_log_level = -1,
.enable_dp_mst = true,
.inject_load_failure = 0,
@@ -62,6 +62,9 @@
#define I915_SKL_GUC_UCODE "i915/skl_guc_ver6_1.bin"
MODULE_FIRMWARE(I915_SKL_GUC_UCODE);
+#define I915_SKL_GUC_UCODE_NEXT "i915/skl_guc_ver8.bin"
+MODULE_FIRMWARE(I915_SKL_GUC_UCODE_NEXT);
+
#define I915_BXT_GUC_UCODE "i915/bxt_guc_ver8_7.bin"
MODULE_FIRMWARE(I915_BXT_GUC_UCODE);
@@ -696,6 +699,10 @@ void intel_guc_init(struct drm_device *dev)
if (!HAS_GUC_UCODE(dev)) {
fw_path = NULL;
} else if (IS_SKYLAKE(dev)) {
+ fw_path = I915_SKL_GUC_UCODE_NEXT;
+ guc_fw->guc_fw_major_wanted = 8;
+ guc_fw->guc_fw_minor_wanted = 11;
+ } else if (IS_SKYLAKE(dev)) {
fw_path = I915_SKL_GUC_UCODE;
guc_fw->guc_fw_major_wanted = 6;
guc_fw->guc_fw_minor_wanted = 1;
Update GuC firmware version to 8.11, and re-enable GuC loading and submission by default on suitable platforms, since it's Intel's Plan of Record that GuC submission shall be used where available. Signed-off-by: Dave Gordon <david.s.gordon@intel.com> --- drivers/gpu/drm/i915/i915_params.c | 4 ++-- drivers/gpu/drm/i915/intel_guc_loader.c | 7 +++++++ 2 files changed, 9 insertions(+), 2 deletions(-)