From patchwork Thu Aug 11 20:49:19 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dhinakaran Pandiyan X-Patchwork-Id: 9275941 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1482C60780 for ; Thu, 11 Aug 2016 20:35:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0454128785 for ; Thu, 11 Aug 2016 20:35:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id ED35C2878B; Thu, 11 Aug 2016 20:35:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7D23428785 for ; Thu, 11 Aug 2016 20:35:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 754C66E9D2; Thu, 11 Aug 2016 20:35:51 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 17DC76E1FF for ; Thu, 11 Aug 2016 20:35:50 +0000 (UTC) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga102.jf.intel.com with ESMTP; 11 Aug 2016 13:35:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,507,1464678000"; d="scan'208";a="863948220" Received: from skynet.jf.intel.com ([10.54.75.148]) by orsmga003.jf.intel.com with ESMTP; 11 Aug 2016 13:35:50 -0700 From: Dhinakaran Pandiyan To: intel-gfx@lists.freedesktop.org Date: Thu, 11 Aug 2016 13:49:19 -0700 Message-Id: <1470948559-2551-1-git-send-email-dhinakaran.pandiyan@intel.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <20160804054854.GR4329@intel.com> References: <20160804054854.GR4329@intel.com> Cc: Dhinakaran Pandiyan Subject: [Intel-gfx] [PATCH v2] drm/i915/dp: Switch to using the DRM function for reading DP link status X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Since a DRM function that reads link DP link status is available, let's use that instead of the i915 clone. drm_dp_dpcd_read_link_status() returns a negative error code if the number of bytes read is not DP_LINK_STATUS_SIZE, drm_dp_dpcd_access() does the length check. Signed-off-by: Dhinakaran Pandiyan v2: Eliminated redundant DP_LINK_STATUS_SIZE length check. --- drivers/gpu/drm/i915/intel_dp.c | 15 ++------------- drivers/gpu/drm/i915/intel_dp_link_training.c | 8 ++++++-- drivers/gpu/drm/i915/intel_drv.h | 2 -- 3 files changed, 8 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 8fe2afa..8eff57e 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -2863,17 +2863,6 @@ static void chv_dp_post_pll_disable(struct intel_encoder *encoder) chv_phy_post_pll_disable(encoder); } -/* - * Fetch AUX CH registers 0x202 - 0x207 which contain - * link status information - */ -bool -intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE]) -{ - return drm_dp_dpcd_read(&intel_dp->aux, DP_LANE0_1_STATUS, link_status, - DP_LINK_STATUS_SIZE) == DP_LINK_STATUS_SIZE; -} - /* These are source-specific values. */ uint8_t intel_dp_voltage_max(struct intel_dp *intel_dp) @@ -3896,8 +3885,8 @@ intel_dp_check_link_status(struct intel_dp *intel_dp) WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex)); - if (!intel_dp_get_link_status(intel_dp, link_status)) { - DRM_ERROR("Failed to get link status\n"); + if (drm_dp_dpcd_read_link_status(&intel_dp->aux, link_status) <= 0) { + DRM_ERROR("failed to get link status\n"); return; } diff --git a/drivers/gpu/drm/i915/intel_dp_link_training.c b/drivers/gpu/drm/i915/intel_dp_link_training.c index 60fb39c..8e60e7c 100644 --- a/drivers/gpu/drm/i915/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/intel_dp_link_training.c @@ -150,7 +150,9 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp) uint8_t link_status[DP_LINK_STATUS_SIZE]; drm_dp_link_train_clock_recovery_delay(intel_dp->dpcd); - if (!intel_dp_get_link_status(intel_dp, link_status)) { + + if (drm_dp_dpcd_read_link_status(&intel_dp->aux, link_status) + <= 0) { DRM_ERROR("failed to get link status\n"); break; } @@ -258,7 +260,9 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp) } drm_dp_link_train_channel_eq_delay(intel_dp->dpcd); - if (!intel_dp_get_link_status(intel_dp, link_status)) { + + if (drm_dp_dpcd_read_link_status(&intel_dp->aux, link_status) + <= 0) { DRM_ERROR("failed to get link status\n"); break; } diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index b1fc67e..a3a2cb9 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1394,8 +1394,6 @@ intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, uint8_t voltage_swing); void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock, uint8_t *link_bw, uint8_t *rate_select); bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp); -bool -intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE]); static inline unsigned int intel_dp_unused_lane_mask(int lane_count) {