From patchwork Mon Aug 15 14:49:58 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: akash.goel@intel.com X-Patchwork-Id: 9281117 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3AB656086A for ; Mon, 15 Aug 2016 14:36:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2C53828CF7 for ; Mon, 15 Aug 2016 14:36:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2134728D00; Mon, 15 Aug 2016 14:36:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D38B428D0E for ; Mon, 15 Aug 2016 14:36:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 36FB46E544; Mon, 15 Aug 2016 14:36:48 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 46EAF6E53F for ; Mon, 15 Aug 2016 14:36:47 +0000 (UTC) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP; 15 Aug 2016 07:36:47 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,525,1464678000"; d="scan'208";a="865682681" Received: from akashgoe-desktop.iind.intel.com ([10.223.82.36]) by orsmga003.jf.intel.com with ESMTP; 15 Aug 2016 07:36:46 -0700 From: akash.goel@intel.com To: intel-gfx@lists.freedesktop.org Date: Mon, 15 Aug 2016 20:19:58 +0530 Message-Id: <1471272599-14586-18-git-send-email-akash.goel@intel.com> X-Mailer: git-send-email 1.9.2 In-Reply-To: <1471272599-14586-1-git-send-email-akash.goel@intel.com> References: <1471272599-14586-1-git-send-email-akash.goel@intel.com> Cc: Akash Goel Subject: [Intel-gfx] [PATCH 17/18] drm/i915: Use SSE4.1 movntdqa based memcpy for sampling GuC log buffer X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Akash Goel In order to have fast reads from the GuC log buffer, used SSE4.1 movntdqa based memcpy function i915_memcpy_from_wc. GuC log buffer has a WC type vmalloc mapping and copying using movntqda from WC type memory is almost as fast as reading from WB memory. This will further reduce the log buffer sampling time, so is needed dearly to deal with the flush interrupt storm when GuC is generating logs at a very high rate. Ideally SSE 4.1 should be present on all chipsets supporting GuC based submisssions, but if not then logging will not be enabled. v2: Rebase. Suggested-by: Chris Wilson Signed-off-by: Akash Goel Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_guc_submission.c | 23 ++++++++++++++++++----- 1 file changed, 18 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c index 7bc75c8..8733c19 100644 --- a/drivers/gpu/drm/i915/i915_guc_submission.c +++ b/drivers/gpu/drm/i915/i915_guc_submission.c @@ -1119,15 +1119,18 @@ static void guc_read_update_log_buffer(struct intel_guc *guc) /* Just copy the newly written data */ if (read_offset <= write_offset) { bytes_to_copy = write_offset - read_offset; - memcpy(dst_data_ptr + read_offset, - src_data_ptr + read_offset, bytes_to_copy); + i915_memcpy_from_wc(dst_data_ptr + read_offset, + src_data_ptr + read_offset, + bytes_to_copy); } else { bytes_to_copy = buffer_size - read_offset; - memcpy(dst_data_ptr + read_offset, - src_data_ptr + read_offset, bytes_to_copy); + i915_memcpy_from_wc(dst_data_ptr + read_offset, + src_data_ptr + read_offset, + bytes_to_copy); bytes_to_copy = write_offset; - memcpy(dst_data_ptr, src_data_ptr, bytes_to_copy); + i915_memcpy_from_wc(dst_data_ptr, src_data_ptr, + bytes_to_copy); } src_data_ptr += buffer_size; @@ -1257,6 +1260,16 @@ static void guc_create_log(struct intel_guc *guc) vma = guc->log.vma; if (!vma) { + /* We require SSE 4.1 for fast reads from the GuC log buffer and + * it should be present on the chipsets supporting GuC based + * submisssions. + */ + if (WARN_ON(!i915_memcpy_from_wc(NULL, NULL, 0))) { + /* logging will not be enabled */ + i915.guc_log_level = -1; + return; + } + vma = guc_allocate_vma(guc, size); if (IS_ERR(vma)) { /* logging will be off */