From patchwork Thu Aug 25 14:19:15 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: arun.siluvery@linux.intel.com X-Patchwork-Id: 9299431 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 65865607D8 for ; Thu, 25 Aug 2016 14:19:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5368128D9C for ; Thu, 25 Aug 2016 14:19:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 431A5292BE; Thu, 25 Aug 2016 14:19:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D85B928D9C for ; Thu, 25 Aug 2016 14:19:22 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3910A6E99D; Thu, 25 Aug 2016 14:19:22 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id B1D446E99D for ; Thu, 25 Aug 2016 14:19:20 +0000 (UTC) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP; 25 Aug 2016 07:19:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.28,575,1464678000"; d="scan'208"; a="1041382727" Received: from asiluver-linux.isw.intel.com ([10.102.226.117]) by orsmga002.jf.intel.com with ESMTP; 25 Aug 2016 07:19:18 -0700 From: Arun Siluvery To: intel-gfx@lists.freedesktop.org Date: Thu, 25 Aug 2016 15:19:15 +0100 Message-Id: <1472134755-34321-1-git-send-email-arun.siluvery@linux.intel.com> X-Mailer: git-send-email 1.9.1 Cc: Armin Reese , Mika Kuoppala Subject: [Intel-gfx] [PATCH] drm/i915: Add a debugfs file to dump complete context X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Armin Reese A 'cat' of the debugfs file i915_dump_lrc, dumps only the first 0x600(1536) bytes of each ring's register state context. It does not provide information about the remaining portion of the register state context. This patch adds new file i915_dump_lrc_complete which displays full register state context. Being able to view the latter in its entirety will be very useful in debugging issues arising from incorrect context setup. i915_dum_lrc still provides a snapshot of the context image. v2: Since most of the content in some pages are mostly zeros, contiguous sequence of zeros are skipped in the output. Cc: Mika Kuoppala Cc: Chris Wilson Signed-off-by: Armin Reese (v1) Signed-off-by: Arun Siluvery --- drivers/gpu/drm/i915/i915_debugfs.c | 70 ++++++++++++++++++++++++++++++------- 1 file changed, 58 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 7d7b4d9..f4b5879 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -1969,13 +1969,20 @@ static int i915_context_status(struct seq_file *m, void *unused) return 0; } +enum { + LRC_CONTEXT_DUMP, /* First PAGE size bytes of register state ctx */ + FULL_CONTEXT_DUMP, /* Full context */ +}; + static void i915_dump_lrc_obj(struct seq_file *m, struct i915_gem_context *ctx, - struct intel_engine_cs *engine) + struct intel_engine_cs *engine, + unsigned int flags) { struct i915_vma *vma = ctx->engine[engine->id].state; struct page *page; - int j; + struct sg_page_iter sg_iter; + int i; seq_printf(m, "CONTEXT: %s %u\n", engine->name, ctx->hw_id); @@ -1993,18 +2000,53 @@ static void i915_dump_lrc_obj(struct seq_file *m, return; } + i = 0; page = i915_gem_object_get_page(vma->obj, LRC_STATE_PN); - if (page) { - u32 *reg_state = kmap_atomic(page); + for_each_sg_page(vma->pages->sgl, &sg_iter, vma->pages->nents, 0) { + int j; + u32 *reg_state; + int run_length = 0; + u32 data_size = (flags == LRC_CONTEXT_DUMP) ? 0x600 : PAGE_SIZE; + unsigned long ggtt_offset = i915_ggtt_offset(vma); + unsigned long page_offset = ggtt_offset + i*PAGE_SIZE; + + if (flags == LRC_CONTEXT_DUMP && i > LRC_STATE_PN) + break; - for (j = 0; j < 0x600 / sizeof(u32) / 4; j += 4) { - seq_printf(m, - "\t[0x%04x] 0x%08x 0x%08x 0x%08x 0x%08x\n", - j * 4, - reg_state[j], reg_state[j + 1], + page = sg_page_iter_page(&sg_iter); + if (WARN_ON(page == NULL)) + break; + + reg_state = kmap_atomic(page); + + seq_printf(m, "Context object page: %d\n", i); + for (j = 0; j < data_size / sizeof(u32); j += 4) { + if (reg_state[j + 0] == 0 && reg_state[j + 1] == 0 && + reg_state[j + 2] == 0 && reg_state[j + 3] == 0) { + run_length += 4; + continue; + } + + if (run_length) { + seq_printf(m, "\t[0x%08lx - 0x%08lx]: 0x00000000\n", + page_offset + (j * 4) - (run_length * 4), + page_offset + (j * 4) - 1); + run_length = 0; + } + + seq_printf(m, "\t[0x%08lx] 0x%08x 0x%08x 0x%08x 0x%08x\n", + page_offset + (j * 4), + reg_state[j + 0], reg_state[j + 1], reg_state[j + 2], reg_state[j + 3]); } + /* zeros in the whole page */ + if (run_length) { + seq_printf(m, "\t[0x%08lx - 0x%08lx]: 0x00000000\n", + page_offset, page_offset + data_size - 1); + run_length = 0; + } kunmap_atomic(reg_state); + ++i; } seq_putc(m, '\n'); @@ -2012,10 +2054,12 @@ static void i915_dump_lrc_obj(struct seq_file *m, static int i915_dump_lrc(struct seq_file *m, void *unused) { + struct drm_info_node *node = (struct drm_info_node *) m->private; struct drm_i915_private *dev_priv = node_to_i915(m->private); struct drm_device *dev = &dev_priv->drm; struct intel_engine_cs *engine; struct i915_gem_context *ctx; + uintptr_t flags = (uintptr_t) node->info_ent->data; int ret; if (!i915.enable_execlists) { @@ -2027,9 +2071,10 @@ static int i915_dump_lrc(struct seq_file *m, void *unused) if (ret) return ret; - list_for_each_entry(ctx, &dev_priv->context_list, link) + list_for_each_entry(ctx, &dev_priv->context_list, link) { for_each_engine(engine, dev_priv) - i915_dump_lrc_obj(m, ctx, engine); + i915_dump_lrc_obj(m, ctx, engine, flags); + } mutex_unlock(&dev->struct_mutex); @@ -5286,7 +5331,8 @@ static const struct drm_info_list i915_debugfs_list[] = { {"i915_vbt", i915_vbt, 0}, {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0}, {"i915_context_status", i915_context_status, 0}, - {"i915_dump_lrc", i915_dump_lrc, 0}, + {"i915_dump_lrc", i915_dump_lrc, 0, (void *)LRC_CONTEXT_DUMP}, + {"i915_dump_lrc_complete", i915_dump_lrc, 0, (void *)FULL_CONTEXT_DUMP}, {"i915_execlists", i915_execlists, 0}, {"i915_forcewake_domains", i915_forcewake_domains, 0}, {"i915_swizzle_info", i915_swizzle_info, 0},