diff --git a/tests/gem_pipe_control_store_loop.c b/tests/gem_pipe_control_store_loop.c
index a155ad1..0e1d477 100644
--- a/tests/gem_pipe_control_store_loop.c
+++ b/tests/gem_pipe_control_store_loop.c
@@ -167,7 +167,7 @@ igt_main
 		igt_assert(bufmgr);
 
 		igt_skip_on(IS_GEN2(devid) || IS_GEN3(devid));
-		igt_skip_on(devid == PCI_CHIP_I965_G); /* has totally broken pipe control */
+		igt_skip_on(IS_BROADWATER(devid)); /* I965_G has totally broken pipe control */
 
 		/* IMPORTANT: No call to
 		 * drm_intel_bufmgr_gem_enable_reuse(bufmgr);
diff --git a/tests/kms_cursor_crc.c b/tests/kms_cursor_crc.c
index d1de450..7137f1c 100644
--- a/tests/kms_cursor_crc.c
+++ b/tests/kms_cursor_crc.c
@@ -427,7 +427,8 @@ static bool has_nonsquare_cursors(uint32_t devid)
 	 * Test non-square cursors a bit on the platforms
 	 * that support such things.
 	 */
-	return devid == PCI_CHIP_845_G || devid == PCI_CHIP_I865_G;
+	return (intel_get_device_info(devid)->is_brookdale
+           || intel_get_device_info(devid)->is_springdale); /* 845_G || I865_G */
 }
 
 static void test_cursor_size(data_t *data)
diff --git a/tools/intel_error_decode.c b/tools/intel_error_decode.c
index 8cbbe84..3c74475 100644
--- a/tools/intel_error_decode.c
+++ b/tools/intel_error_decode.c
@@ -548,7 +548,7 @@ static void
 read_data_file(FILE *file)
 {
 	struct drm_intel_decode *decode_ctx = NULL;
-	uint32_t devid = PCI_CHIP_I855_GM;
+	uint32_t devid = 0x3582; /* I855GM */
 	uint32_t *data = NULL;
 	uint32_t head[MAX_RINGS];
 	int head_idx = 0;
diff --git a/tools/intel_stepping.c b/tools/intel_stepping.c
index 7839ef5..24f1ae8 100644
--- a/tools/intel_stepping.c
+++ b/tools/intel_stepping.c
@@ -205,8 +205,7 @@ int main(int argc, char **argv)
 		exit(1);
 	}
 
-	switch (dev->device_id) {
-	case PCI_CHIP_I915_G:
+   if(IS_915G(dev->device_id)) {
 		if (stepping < 0x04)
 			step_desc = "<B1";
 		else if (stepping == 0x04)
@@ -217,8 +216,8 @@ int main(int argc, char **argv)
 			step_desc = ">C2";
 		else
 			step_desc = ">B1 <C2";
-		break;
-	case PCI_CHIP_I915_GM:
+   }
+   else if(IS_915GM(dev->device_id)) {
 		if (stepping < 0x03)
 			step_desc = "<B1";
 		else if (stepping == 0x03)
@@ -227,51 +226,53 @@ int main(int argc, char **argv)
 			step_desc = "C1/C2";
 		else
 			step_desc = ">C2";
-		break;
-	case PCI_CHIP_I945_GM:
+   }
+   else if(IS_945GM(dev->device_id)) {
 		if (stepping < 0x03)
 			step_desc = "<A3";
 		else if (stepping == 0x03)
 			step_desc = "A3";
 		else
 			step_desc = ">A3";
-		break;
-	case PCI_CHIP_I965_G:
-	case PCI_CHIP_I965_Q:
+   }
+   else if (IS_BROADWATER(dev->device_id) && dev->device_id != 0x2982) {
+      /* I965G  || I965Q and not I965_G_1 */
 		if (stepping < 0x02)
 			step_desc = "<C1";
 		else if (stepping == 0x02)
 			step_desc = "C1/C2";
 		else
 			step_desc = ">C2";
-		break;
-	case PCI_CHIP_I965_GM:
+   }
+   else if (IS_CRESTLINE(dev->device_id)) {
+      /* I965GM */
 		if (stepping < 0x03)
 			step_desc = "<C0";
 		else if (stepping == 0x03)
 			step_desc = "C0";
 		else
 			step_desc = ">C0";
-		break;
-	case PCI_CHIP_I965_G_1:
+   }
+   else if (IS_BROADWATER(dev->device_id) && dev->device_id == 0x2982) {
+      /* I965_G_1 */
 		if (stepping < 0x03)
 			step_desc = "<E0";
 		else if (stepping == 0x03)
 			step_desc = "E0";
 		else
 			step_desc = ">E0";
-		break;
-	case PCI_CHIP_GM45_GM:
+   }
+   else if (IS_GM45(dev->device_id)) {
+	/* GM45_GM */
 		if (stepping < 0x07)
 			step_desc = "<B3";
 		else if (stepping == 0x03)
 			step_desc = "B3";
 		else
 			step_desc = ">B3";
-		break;
-	case PCI_CHIP_G45_G:
-	case PCI_CHIP_Q45_G:
-	case PCI_CHIP_G41_G:
+   }
+   else if (IS_G45(dev->device_id)) {
+	/* G45_G || Q45_G || G41_G */
 		if (stepping < 0x02)
 			step_desc = "<A2";
 		else if (stepping == 0x02)
@@ -280,7 +281,6 @@ int main(int argc, char **argv)
 			step_desc = "A3";
 		else
 			step_desc = ">A3";
-		break;
 	}
 
 	printf("Vendor: 0x%04x, Device: 0x%04x, Revision: 0x%02x (%s)\n",
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index e9a2b05..60af87d 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -796,11 +796,10 @@ static void gen3_wm_dump(void)
 		       plane_name[i], wms[i].wm, wms[i].fifo, wms[i].burst);
 	}
 	/* FIXME G33 too perhaps? */
-	if (devid == PCI_CHIP_I945_G || devid == PCI_CHIP_I945_GM ||
-	    devid == PCI_CHIP_I945_GME) {
+	if (IS_945G(devid) || IS_945GM(devid)) {
 		printf("CxSR = %s\n",
 		       endis(REG_DECODE1(fw_blc_self, 15, 1)));
-	} else if (devid == PCI_CHIP_I915_GM) {
+	} else if (IS_915GM(devid)) {
 		printf("CxSR = %s\n",
 		       endis(REG_DECODE1(instpm, 12, 1)));
 	}
@@ -848,7 +847,8 @@ static void gen2_wm_dump(void)
 	wms[PRI_A].burst = (REG_DECODE1(fw_blc, 8, 2) + 1) * 4;
 	wms[PRI_A].wm    = REG_DECODE1(fw_blc, 0, 8);
 
-	if (devid == PCI_CHIP_845_G || devid == PCI_CHIP_I865_G) {
+	if ((intel_get_device_info(devid)->is_brookdale)
+       || (intel_get_device_info(devid)->is_springdale)) {
 		wms[PRI_A].valid = true;
 		wms[PRI_C].valid = true;
 
@@ -860,11 +860,11 @@ static void gen2_wm_dump(void)
 		wms[PRI_B].valid = true;
 		wms[PRI_C].valid = true;
 
-		if (devid == PCI_CHIP_I830_M)
+		if ((intel_get_device_info(devid))->is_almador)
 			totalsize = 288;
 		else
 			totalsize = 256;
-		totalsize = (devid == PCI_CHIP_I855_GM) ? 256 : 288;
+		totalsize = ((intel_get_device_info(devid))->is_montara) ? 256 : 288;
 		wms[PRI_A].fifo = REG_DECODE1(dsparb, 0, 9) - 0;
 		wms[PRI_B].fifo = REG_DECODE1(dsparb, 9, 9) - wms[PRI_A].fifo;
 		wms[PRI_C].fifo = totalsize - wms[PRI_B].fifo - wms[PRI_A].fifo - 1;
@@ -876,7 +876,7 @@ static void gen2_wm_dump(void)
 		printf("%s: WM = %d, FIFO = %d, burst = %d\n",
 		       plane_name[i], wms[i].wm, wms[i].fifo, wms[i].burst);
 	}
-	if (devid == PCI_CHIP_I855_GM || devid == PCI_CHIP_I854_G) {
+	if ((intel_get_device_info(devid))->is_montara) {
 		printf("CxSR = %s (%d)\n",
 		       endis(REG_DECODE1(mi_state, 3, 2)),
 		       REG_DECODE1(mi_state, 3, 2));
