From patchwork Wed Sep 7 17:55:38 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Gordon X-Patchwork-Id: 9319733 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 78573607D3 for ; Wed, 7 Sep 2016 17:56:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8C4CD293C9 for ; Wed, 7 Sep 2016 17:56:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 80FEC293DD; Wed, 7 Sep 2016 17:56:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id EBAF5293C9 for ; Wed, 7 Sep 2016 17:56:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 142236EBA5; Wed, 7 Sep 2016 17:56:00 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id CDCE16EBA5 for ; Wed, 7 Sep 2016 17:55:58 +0000 (UTC) Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga103.fm.intel.com with ESMTP; 07 Sep 2016 10:55:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.30,296,1470726000"; d="scan'208";a="6077466" Received: from dsgordon-linux2.isw.intel.com ([10.102.226.88]) by orsmga004.jf.intel.com with ESMTP; 07 Sep 2016 10:55:57 -0700 From: Dave Gordon To: intel-gfx@lists.freedesktop.org Date: Wed, 7 Sep 2016 18:55:38 +0100 Message-Id: <1473270942-35905-2-git-send-email-david.s.gordon@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1473270942-35905-1-git-send-email-david.s.gordon@intel.com> References: <1473270942-35905-1-git-send-email-david.s.gordon@intel.com> Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [CI_RESEND v4 1/5] drm/i915/guc: symbolic names for GuC submission preferences X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP The existing code that accesses the "enable_guc_submission" parameter uses explicit numerical values for the various possibilities, including in one case relying on boolean 0/1 mapping to specific values (which could be confusing for maintainers). So this patch just provides and uses names for the values representing the DEFAULT, DISABLED, PREFERRED, and MANDATORY submission options that the user can select (-1, 0, 1, 2 respectively). This should produce identical code to the previous version! Signed-off-by: Dave Gordon Cc: Tvrtko Ursulin Cc: Jani Nikula --- drivers/gpu/drm/i915/i915_guc_submission.c | 2 +- drivers/gpu/drm/i915/intel_guc.h | 6 ++++++ drivers/gpu/drm/i915/intel_guc_loader.c | 15 ++++++++------- drivers/gpu/drm/i915/intel_lrc.c | 4 ++-- 4 files changed, 17 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c index 77526d7..01fd6a6 100644 --- a/drivers/gpu/drm/i915/i915_guc_submission.c +++ b/drivers/gpu/drm/i915/i915_guc_submission.c @@ -970,7 +970,7 @@ int i915_guc_submission_init(struct drm_i915_private *dev_priv) bitmap_clear(guc->doorbell_bitmap, 0, GUC_MAX_DOORBELLS); i915_guc_submission_disable(dev_priv); - if (!i915.enable_guc_submission) + if (i915.enable_guc_submission == GUC_SUBMISSION_DISABLED) return 0; /* not enabled */ if (guc->ctx_pool_vma) diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h index c973262..941d70e 100644 --- a/drivers/gpu/drm/i915/intel_guc.h +++ b/drivers/gpu/drm/i915/intel_guc.h @@ -89,6 +89,12 @@ struct i915_guc_client { uint64_t submissions[I915_NUM_ENGINES]; }; +enum { + GUC_SUBMISSION_DEFAULT = -1, + GUC_SUBMISSION_DISABLED = 0, + GUC_SUBMISSION_PREFERRED, + GUC_SUBMISSION_MANDATORY +}; enum intel_guc_fw_status { GUC_FIRMWARE_FAIL = -1, GUC_FIRMWARE_NONE = 0, diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c index 853928f..45b7155 100644 --- a/drivers/gpu/drm/i915/intel_guc_loader.c +++ b/drivers/gpu/drm/i915/intel_guc_loader.c @@ -202,7 +202,7 @@ static void set_guc_init_params(struct drm_i915_private *dev_priv) } /* If GuC submission is enabled, set up additional parameters here */ - if (i915.enable_guc_submission) { + if (i915.enable_guc_submission != GUC_SUBMISSION_DISABLED) { u32 pgs = i915_ggtt_offset(dev_priv->guc.ctx_pool_vma); u32 ctx_in_16 = GUC_MAX_GPU_CONTEXTS / 16; @@ -507,7 +507,7 @@ int intel_guc_setup(struct drm_device *dev) intel_guc_fw_status_repr(guc_fw->guc_fw_fetch_status), intel_guc_fw_status_repr(guc_fw->guc_fw_load_status)); - if (i915.enable_guc_submission) { + if (i915.enable_guc_submission != GUC_SUBMISSION_DISABLED) { err = i915_guc_submission_enable(dev_priv); if (err) goto fail; @@ -535,7 +535,7 @@ int intel_guc_setup(struct drm_device *dev) */ if (i915.enable_guc_loading > 1) { ret = -EIO; - } else if (i915.enable_guc_submission > 1) { + } else if (i915.enable_guc_submission >= GUC_SUBMISSION_MANDATORY) { ret = -EIO; } else { ret = 0; @@ -550,7 +550,7 @@ int intel_guc_setup(struct drm_device *dev) else DRM_WARN("GuC firmware load failed: %d\n", err); - if (i915.enable_guc_submission) { + if (i915.enable_guc_submission != GUC_SUBMISSION_DISABLED) { if (fw_path == NULL) DRM_INFO("GuC submission without firmware not supported\n"); if (ret == 0) @@ -558,7 +558,7 @@ int intel_guc_setup(struct drm_device *dev) else DRM_ERROR("GuC init failed: %d\n", ret); } - i915.enable_guc_submission = 0; + i915.enable_guc_submission = GUC_SUBMISSION_DISABLED; return ret; } @@ -703,8 +703,9 @@ void intel_guc_init(struct drm_device *dev) /* A negative value means "use platform default" */ if (i915.enable_guc_loading < 0) i915.enable_guc_loading = HAS_GUC_UCODE(dev); - if (i915.enable_guc_submission < 0) - i915.enable_guc_submission = HAS_GUC_SCHED(dev); + if (i915.enable_guc_submission <= GUC_SUBMISSION_DEFAULT) + i915.enable_guc_submission = HAS_GUC_SCHED(dev) ? + GUC_SUBMISSION_PREFERRED : GUC_SUBMISSION_DISABLED; if (!HAS_GUC_UCODE(dev)) { fw_path = NULL; diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 92bfe47..4732792 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -662,7 +662,7 @@ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request request->ring = ce->ring; - if (i915.enable_guc_submission) { + if (i915.enable_guc_submission != GUC_SUBMISSION_DISABLED) { /* * Check that the GuC has space for the request before * going any further, as the i915_add_request() call @@ -798,7 +798,7 @@ static int intel_lr_context_pin(struct i915_gem_context *ctx, ce->state->obj->dirty = true; /* Invalidate GuC TLB. */ - if (i915.enable_guc_submission) { + if (i915.enable_guc_submission != GUC_SUBMISSION_DISABLED) { struct drm_i915_private *dev_priv = ctx->i915; I915_WRITE(GEN8_GTCR, GEN8_GTCR_INVALIDATE); }