Message ID | 1475177808-29955-1-git-send-email-paulo.r.zanoni@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Pushed, thanks! On Thu, 2016-09-29 at 16:36 -0300, Paulo Zanoni wrote: > We were previously adding all the planes owned by the CRTC even when > the ddb partitioning didn't change for them. As a consequence, a lot > of functions were being called when we were just moving the cursor > around the screen, such as skylake_update_primary_plane(). > > This was causing flickering on the primary plane when moving the > cursor. I'm not 100% sure which operation caused the flickering, but > we were writing to a lot of registers, so it could be any of these > writes. With this patch, just moving the mouse won't add the primary > plane to the commit since it won't trigger a change in DDB > partitioning. > > v2: Use skl_ddb_entry_equal() (Lyude). > > Fixes: 05a76d3d6ad1 ("drm/i915/skl: Ensure pipes with changed wms get > added to the state") > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97888 > Cc: Lyude <cpaul@redhat.com> > Cc: Mike Lothian <mike@fireburn.co.uk> > Cc: stable@vger.kernel.org > Reported-and-bisected-by: Mike Lothian <mike@fireburn.co.uk> > Reviewed-by: Lyude <cpaul@redhat.com> > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > --- > drivers/gpu/drm/i915/intel_pm.c | 37 > ++++++++++++++++++++++++++++++++++++- > 1 file changed, 36 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c > b/drivers/gpu/drm/i915/intel_pm.c > index 5d39ad2..425544b 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3966,6 +3966,41 @@ pipes_modified(struct drm_atomic_state *state) > return ret; > } > > +int > +skl_ddb_add_affected_planes(struct intel_crtc_state *cstate) > +{ > + struct drm_atomic_state *state = cstate->base.state; > + struct drm_device *dev = state->dev; > + struct drm_crtc *crtc = cstate->base.crtc; > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > + struct drm_i915_private *dev_priv = to_i915(dev); > + struct intel_atomic_state *intel_state = > to_intel_atomic_state(state); > + struct skl_ddb_allocation *new_ddb = &intel_state- > >wm_results.ddb; > + struct skl_ddb_allocation *cur_ddb = &dev_priv- > >wm.skl_hw.ddb; > + struct drm_plane_state *plane_state; > + struct drm_plane *plane; > + enum pipe pipe = intel_crtc->pipe; > + int id; > + > + WARN_ON(!drm_atomic_get_existing_crtc_state(state, crtc)); > + > + drm_for_each_plane_mask(plane, dev, crtc->state->plane_mask) > { > + id = skl_wm_plane_id(to_intel_plane(plane)); > + > + if (skl_ddb_entry_equal(&cur_ddb->plane[pipe][id], > + &new_ddb->plane[pipe][id]) > && > + skl_ddb_entry_equal(&cur_ddb->y_plane[pipe][id], > + &new_ddb- > >y_plane[pipe][id])) > + continue; > + > + plane_state = drm_atomic_get_plane_state(state, > plane); > + if (IS_ERR(plane_state)) > + return PTR_ERR(plane_state); > + } > + > + return 0; > +} > + > static int > skl_compute_ddb(struct drm_atomic_state *state) > { > @@ -4030,7 +4065,7 @@ skl_compute_ddb(struct drm_atomic_state *state) > if (ret) > return ret; > > - ret = drm_atomic_add_affected_planes(state, > &intel_crtc->base); > + ret = skl_ddb_add_affected_planes(cstate); > if (ret) > return ret; > }
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 5d39ad2..425544b 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3966,6 +3966,41 @@ pipes_modified(struct drm_atomic_state *state) return ret; } +int +skl_ddb_add_affected_planes(struct intel_crtc_state *cstate) +{ + struct drm_atomic_state *state = cstate->base.state; + struct drm_device *dev = state->dev; + struct drm_crtc *crtc = cstate->base.crtc; + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + struct drm_i915_private *dev_priv = to_i915(dev); + struct intel_atomic_state *intel_state = to_intel_atomic_state(state); + struct skl_ddb_allocation *new_ddb = &intel_state->wm_results.ddb; + struct skl_ddb_allocation *cur_ddb = &dev_priv->wm.skl_hw.ddb; + struct drm_plane_state *plane_state; + struct drm_plane *plane; + enum pipe pipe = intel_crtc->pipe; + int id; + + WARN_ON(!drm_atomic_get_existing_crtc_state(state, crtc)); + + drm_for_each_plane_mask(plane, dev, crtc->state->plane_mask) { + id = skl_wm_plane_id(to_intel_plane(plane)); + + if (skl_ddb_entry_equal(&cur_ddb->plane[pipe][id], + &new_ddb->plane[pipe][id]) && + skl_ddb_entry_equal(&cur_ddb->y_plane[pipe][id], + &new_ddb->y_plane[pipe][id])) + continue; + + plane_state = drm_atomic_get_plane_state(state, plane); + if (IS_ERR(plane_state)) + return PTR_ERR(plane_state); + } + + return 0; +} + static int skl_compute_ddb(struct drm_atomic_state *state) { @@ -4030,7 +4065,7 @@ skl_compute_ddb(struct drm_atomic_state *state) if (ret) return ret; - ret = drm_atomic_add_affected_planes(state, &intel_crtc->base); + ret = skl_ddb_add_affected_planes(cstate); if (ret) return ret; }