From patchwork Fri Sep 30 17:48:40 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 9358679 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8EA24600C8 for ; Fri, 30 Sep 2016 17:49:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 853EC2A12A for ; Fri, 30 Sep 2016 17:49:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 79D092A131; Fri, 30 Sep 2016 17:49:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 09CAF2A12A for ; Fri, 30 Sep 2016 17:49:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9E30B6E241; Fri, 30 Sep 2016 17:49:08 +0000 (UTC) X-Original-To: Intel-gfx@lists.freedesktop.org Delivered-To: Intel-gfx@lists.freedesktop.org Received: from mail-wm0-x243.google.com (mail-wm0-x243.google.com [IPv6:2a00:1450:400c:c09::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id 70E296E241 for ; Fri, 30 Sep 2016 17:49:03 +0000 (UTC) Received: by mail-wm0-x243.google.com with SMTP id b184so4453913wma.3 for ; Fri, 30 Sep 2016 10:49:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ursulin-net.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=UQmq0vSdP+ZZ9Ui2BkFjKPeKp6Q/lsgiVJjCffRv8WY=; b=IDfKnTDk4L3wmkOKY2CIT9JbKd4mLvJwsduPU3kHHfnkGgHeT9pF59zS5pUqeHCI3W aRl5ZhTi7S71iDxbgjpTUyyJwkiLMvcJoRFeYRlimdMYNKcHAA/MK8/F5fNqz9hVrEZu 4lKYtI7DK7cVB+8INC+G0RjiRwL6oH7oZD7mY6pryQsGZ/rGiPTAhUkx/Yx+VI99PNBF sr53FQgodCoeCQpy20rRTPe8qv4iBwYKY9lw89OpNz1GMxv6y1Ow91aY2Wkts2Fjxi6w 0/yLNkIO57Ec3a87pTVgdYAFcWIXbYzrQ3J01AuoxtaVmJEJTAKDHbVAQ8J3eeYlrFh1 JIpw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=UQmq0vSdP+ZZ9Ui2BkFjKPeKp6Q/lsgiVJjCffRv8WY=; b=Lp9e7Xr+GKbg2rI/H4Vb8XGG3AxDwvaUx6fvrjqnMuqC8Z5hxbxMdDWAFRqPLQRRPX TKv7HsuMALJbUxPLQle0sVa+3+SMrDkjWitpmihYakKRXNxkap0JYp4r5dhXwJYmMoJi VfzFv9QiFOaqU1oeoVk7C26Gc1U8REt4Tu8IzcrVQoA/ANWWJKG/tPYnkdHA2Uet34Ch e7fRBaXDwJD27hmHNei2h5C4+5hz/2LyswIvS5gVBKD6rYjMPNTHIitkQfm9Uq8FAmZK tPJ10hRPBzY/FXs9vswwTQqsdR9tO2+9Dx47oYG7lMOAuLvjbD6nOjoKM8ePfSL/Ob0X CyIQ== X-Gm-Message-State: AA6/9RmEodQbWmgUVVTE/sASCeiTpGswQR3SVByIJFlce1/8BTFkk3yID1FputrQdJpRSA== X-Received: by 10.194.137.81 with SMTP id qg17mr7185884wjb.205.1475257741865; Fri, 30 Sep 2016 10:49:01 -0700 (PDT) Received: from e31.Home ([2a02:c7d:9b6d:e300:916a:6cab:ac67:71c2]) by smtp.gmail.com with ESMTPSA id a1sm246125wjl.28.2016.09.30.10.49.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 30 Sep 2016 10:49:01 -0700 (PDT) From: Tvrtko Ursulin X-Google-Original-From: Tvrtko Ursulin To: Intel-gfx@lists.freedesktop.org Date: Fri, 30 Sep 2016 18:48:40 +0100 Message-Id: <1475257729-11283-6-git-send-email-tvrtko.ursulin@linux.intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1475257729-11283-1-git-send-email-tvrtko.ursulin@linux.intel.com> References: <1475257729-11283-1-git-send-email-tvrtko.ursulin@linux.intel.com> Subject: [Intel-gfx] [PATCH 05/14] drm/i915: Sort forcewake mapping tables X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Tvrtko Ursulin Sorting the tables (verified at runtime to help during development) is another prerequisite for interesting work which will follow. v2: * Remove const away cast and improve comments. (Chris Wilson) * Check tables only when debug option is enabled. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/intel_uncore.c | 56 ++++++++++++++++++++++++++++--------- 1 file changed, 43 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index e21e65ab2a16..5ca65de340b7 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -605,16 +605,35 @@ find_fw_domain(u32 offset, const struct intel_forcewake_range *ranges, return -1; } +static void +intel_fw_table_check(const struct intel_forcewake_range *ranges, + unsigned int num_ranges) +{ +#ifdef CONFIG_DRM_I915_DEBUG + unsigned int i; + const struct intel_forcewake_range *entry = ranges; + s32 prev = -1; + + for (i = 0; i < num_ranges; i++, entry++) { + WARN_ON_ONCE(prev >= (s32)entry->start); + prev = entry->start; + WARN_ON_ONCE(prev >= (s32)entry->end); + prev = entry->end; + } +#endif +} + #define GEN_FW_RANGE(s, e, d) \ { .start = (s), .end = (e), .domains = (d) } +/* *Must* be sorted by offset ranges! See intel_fw_table_check(). */ static const struct intel_forcewake_range __vlv_fw_ranges[] = { GEN_FW_RANGE(0x2000, 0x3fff, FORCEWAKE_RENDER), GEN_FW_RANGE(0x5000, 0x7fff, FORCEWAKE_RENDER), GEN_FW_RANGE(0xb000, 0x11fff, FORCEWAKE_RENDER), - GEN_FW_RANGE(0x2e000, 0x2ffff, FORCEWAKE_RENDER), GEN_FW_RANGE(0x12000, 0x13fff, FORCEWAKE_MEDIA), GEN_FW_RANGE(0x22000, 0x23fff, FORCEWAKE_MEDIA), + GEN_FW_RANGE(0x2e000, 0x2ffff, FORCEWAKE_RENDER), GEN_FW_RANGE(0x30000, 0x3ffff, FORCEWAKE_MEDIA), }; @@ -660,23 +679,24 @@ static bool is_gen8_shadowed(u32 offset) __fwd; \ }) +/* *Must* be sorted by offset ranges! See intel_fw_table_check(). */ static const struct intel_forcewake_range __chv_fw_ranges[] = { GEN_FW_RANGE(0x2000, 0x3fff, FORCEWAKE_RENDER), + GEN_FW_RANGE(0x4000, 0x4fff, FORCEWAKE_RENDER | FORCEWAKE_MEDIA), GEN_FW_RANGE(0x5200, 0x7fff, FORCEWAKE_RENDER), + GEN_FW_RANGE(0x8000, 0x82ff, FORCEWAKE_RENDER | FORCEWAKE_MEDIA), GEN_FW_RANGE(0x8300, 0x84ff, FORCEWAKE_RENDER), - GEN_FW_RANGE(0xb000, 0xb47f, FORCEWAKE_RENDER), - GEN_FW_RANGE(0xe000, 0xe7ff, FORCEWAKE_RENDER), + GEN_FW_RANGE(0x8500, 0x85ff, FORCEWAKE_RENDER | FORCEWAKE_MEDIA), GEN_FW_RANGE(0x8800, 0x88ff, FORCEWAKE_MEDIA), + GEN_FW_RANGE(0x9000, 0xafff, FORCEWAKE_RENDER | FORCEWAKE_MEDIA), + GEN_FW_RANGE(0xb000, 0xb47f, FORCEWAKE_RENDER), GEN_FW_RANGE(0xd000, 0xd7ff, FORCEWAKE_MEDIA), + GEN_FW_RANGE(0xe000, 0xe7ff, FORCEWAKE_RENDER), + GEN_FW_RANGE(0xf000, 0xffff, FORCEWAKE_RENDER | FORCEWAKE_MEDIA), GEN_FW_RANGE(0x12000, 0x13fff, FORCEWAKE_MEDIA), GEN_FW_RANGE(0x1a000, 0x1bfff, FORCEWAKE_MEDIA), GEN_FW_RANGE(0x1e800, 0x1e9ff, FORCEWAKE_MEDIA), GEN_FW_RANGE(0x30000, 0x37fff, FORCEWAKE_MEDIA), - GEN_FW_RANGE(0x4000, 0x4fff, FORCEWAKE_RENDER | FORCEWAKE_MEDIA), - GEN_FW_RANGE(0x8000, 0x82ff, FORCEWAKE_RENDER | FORCEWAKE_MEDIA), - GEN_FW_RANGE(0x8500, 0x85ff, FORCEWAKE_RENDER | FORCEWAKE_MEDIA), - GEN_FW_RANGE(0x9000, 0xafff, FORCEWAKE_RENDER | FORCEWAKE_MEDIA), - GEN_FW_RANGE(0xf000, 0xffff, FORCEWAKE_RENDER | FORCEWAKE_MEDIA), }; #define __chv_reg_read_fw_domains(offset) \ @@ -703,23 +723,24 @@ static const struct intel_forcewake_range __chv_fw_ranges[] = { __fwd; \ }) +/* *Must* be sorted by offset ranges! See intel_fw_table_check(). */ static const struct intel_forcewake_range __gen9_fw_ranges[] = { GEN_FW_RANGE(0xb00, 0x1fff, 0), /* uncore range */ GEN_FW_RANGE(0x2000, 0x26ff, FORCEWAKE_RENDER), GEN_FW_RANGE(0x3000, 0x3fff, FORCEWAKE_RENDER), GEN_FW_RANGE(0x5200, 0x7fff, FORCEWAKE_RENDER), + GEN_FW_RANGE(0x8130, 0x813f, FORCEWAKE_MEDIA), GEN_FW_RANGE(0x8140, 0x815f, FORCEWAKE_RENDER), GEN_FW_RANGE(0x8300, 0x84ff, FORCEWAKE_RENDER), + GEN_FW_RANGE(0x8800, 0x89ff, FORCEWAKE_MEDIA), GEN_FW_RANGE(0x8c00, 0x8cff, FORCEWAKE_RENDER), - GEN_FW_RANGE(0xb000, 0xb47f, FORCEWAKE_RENDER), - GEN_FW_RANGE(0xe000, 0xe8ff, FORCEWAKE_RENDER), - GEN_FW_RANGE(0x24400, 0x247ff, FORCEWAKE_RENDER), GEN_FW_RANGE(0x9400, 0x97ff, FORCEWAKE_RENDER | FORCEWAKE_MEDIA), - GEN_FW_RANGE(0x8130, 0x813f, FORCEWAKE_MEDIA), - GEN_FW_RANGE(0x8800, 0x89ff, FORCEWAKE_MEDIA), + GEN_FW_RANGE(0xb000, 0xb47f, FORCEWAKE_RENDER), GEN_FW_RANGE(0xd000, 0xd7ff, FORCEWAKE_MEDIA), + GEN_FW_RANGE(0xe000, 0xe8ff, FORCEWAKE_RENDER), GEN_FW_RANGE(0x12000, 0x13fff, FORCEWAKE_MEDIA), GEN_FW_RANGE(0x1a000, 0x1e9ff, FORCEWAKE_MEDIA), + GEN_FW_RANGE(0x24400, 0x247ff, FORCEWAKE_RENDER), GEN_FW_RANGE(0x30000, 0x3ffff, FORCEWAKE_MEDIA), }; @@ -1299,11 +1320,17 @@ void intel_uncore_init(struct drm_i915_private *dev_priv) switch (INTEL_INFO(dev_priv)->gen) { default: case 9: + intel_fw_table_check(__gen9_fw_ranges, + ARRAY_SIZE(__gen9_fw_ranges)); + ASSIGN_WRITE_MMIO_VFUNCS(gen9); ASSIGN_READ_MMIO_VFUNCS(gen9); break; case 8: if (IS_CHERRYVIEW(dev_priv)) { + intel_fw_table_check(__chv_fw_ranges, + ARRAY_SIZE(__chv_fw_ranges)); + ASSIGN_WRITE_MMIO_VFUNCS(chv); ASSIGN_READ_MMIO_VFUNCS(chv); @@ -1317,6 +1344,9 @@ void intel_uncore_init(struct drm_i915_private *dev_priv) ASSIGN_WRITE_MMIO_VFUNCS(gen6); if (IS_VALLEYVIEW(dev_priv)) { + intel_fw_table_check(__vlv_fw_ranges, + ARRAY_SIZE(__vlv_fw_ranges)); + ASSIGN_READ_MMIO_VFUNCS(vlv); } else { ASSIGN_READ_MMIO_VFUNCS(gen6);