From patchwork Fri Sep 30 17:48:43 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 9358697 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3BD38600C8 for ; Fri, 30 Sep 2016 17:49:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3330D2A11C for ; Fri, 30 Sep 2016 17:49:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 27FA02A12F; Fri, 30 Sep 2016 17:49:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 85C3F2A11C for ; Fri, 30 Sep 2016 17:49:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1B91F6EAB0; Fri, 30 Sep 2016 17:49:29 +0000 (UTC) X-Original-To: Intel-gfx@lists.freedesktop.org Delivered-To: Intel-gfx@lists.freedesktop.org Received: from mail-wm0-x244.google.com (mail-wm0-x244.google.com [IPv6:2a00:1450:400c:c09::244]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3D78B6E23F for ; Fri, 30 Sep 2016 17:49:06 +0000 (UTC) Received: by mail-wm0-x244.google.com with SMTP id b4so4473574wmb.2 for ; Fri, 30 Sep 2016 10:49:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ursulin-net.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4qHNE/5X6YLKFudrgFTL4h5LdXKBi7REAz8pz4Smm2Y=; b=VdTQN3spoYcRjFAafT30PawXkUIRPy30zraagw4rcX7C4nu2OlTC1YsuWCxHd0889Y 5FzL3geAaExfBnvvD5PWSVdN5S4BV75lrnikg914HH+406Sdy3+W1jtkpOkK+qSjObGY dXYSsFufwcD5fXCLxm9sAWLm6waXFDqcdWD9jqTmEAX4mTSCz1FfLpXs9oC3Kliz9oAr l+4lRsZtADs/5mqey0UJGb/o9AtwSOHwu3aeyw0WLA0UGIf/vzYhKLPdsj6RHNRiEyC6 2ZoSjYpMv1ftzNgR/co5d8zhoG0WEgvM4KCtvAXhkzyk9GQgvPbL8juP2DiB7U4EPjql Ducw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=4qHNE/5X6YLKFudrgFTL4h5LdXKBi7REAz8pz4Smm2Y=; b=TIkUKg+1s0BDuA5fnCJCE49S3S2mjdd/G3hSioggn74444tIQ6bRHa4dHfyW6WSnrW 8F5x4nBfnA6TJEbwdeL278S+TkLO6fvmWDXOSiuApKuaoisqI+YgSgX4JzGDkhFwxGSa o1cSUAk/YDyGh2gUVKbTM/DZdrHHolQGieHrmFSw3hfKXRg58PjjdEmDMjsGyiG25fqF uJ8tInuX+CqJ7jj0cscezDudouLBarnXfKPnQtwLPPleZzCaf1qyLuCiH9AhRo7/FeSE 6ud6JCblDnOcGjkCKXanvZ5tUdFtdyZ0Btvd7SQaZPO3KDnazHyGoKNf0TAxp1lVYV7G mUZQ== X-Gm-Message-State: AA6/9Rkt1QzA+6osKF4wtIN3ugqc9hZ6miH9Z43/gvMG0QzbCoBPwAUPtPnR7OWcLbO1xQ== X-Received: by 10.194.241.227 with SMTP id wl3mr7248980wjc.177.1475257744349; Fri, 30 Sep 2016 10:49:04 -0700 (PDT) Received: from e31.Home ([2a02:c7d:9b6d:e300:916a:6cab:ac67:71c2]) by smtp.gmail.com with ESMTPSA id a1sm246125wjl.28.2016.09.30.10.49.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 30 Sep 2016 10:49:03 -0700 (PDT) From: Tvrtko Ursulin X-Google-Original-From: Tvrtko Ursulin To: Intel-gfx@lists.freedesktop.org Date: Fri, 30 Sep 2016 18:48:43 +0100 Message-Id: <1475257729-11283-9-git-send-email-tvrtko.ursulin@linux.intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1475257729-11283-1-git-send-email-tvrtko.ursulin@linux.intel.com> References: <1475257729-11283-1-git-send-email-tvrtko.ursulin@linux.intel.com> Subject: [Intel-gfx] [PATCH 08/14] drm/i915: Store the active forcewake range table pointer X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Tvrtko Ursulin If we store this in the uncore structure we are on a good way to show more commonality between the per-platform implementations. v2: Constify table pointer and correct coding style. (Chris Wilson) Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_drv.h | 10 +++++ drivers/gpu/drm/i915/intel_uncore.c | 73 ++++++++++++++++++------------------- 2 files changed, 46 insertions(+), 37 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 9b1997fd8c87..3b14938aa09e 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -582,9 +582,19 @@ struct intel_uncore_funcs { uint32_t val, bool trace); }; +struct intel_forcewake_range { + u32 start; + u32 end; + + enum forcewake_domains domains; +}; + struct intel_uncore { spinlock_t lock; /** lock is also taken in irq contexts. */ + const struct intel_forcewake_range *fw_domains_table; + unsigned int fw_domains_table_entries; + struct intel_uncore_funcs funcs; unsigned fifo_count; diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 04ed1721c69f..050596fe90c5 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -582,14 +582,6 @@ void assert_forcewakes_inactive(struct drm_i915_private *dev_priv) __fwd; \ }) -struct intel_forcewake_range -{ - u32 start; - u32 end; - - enum forcewake_domains domains; -}; - static int fw_range_cmp(const void *key, const void *elt) { const struct intel_forcewake_range *entry = elt; @@ -604,28 +596,37 @@ static int fw_range_cmp(const void *key, const void *elt) } static enum forcewake_domains -find_fw_domain(u32 offset, const struct intel_forcewake_range *ranges, - unsigned int num_ranges) +find_fw_domain(struct drm_i915_private *dev_priv, u32 offset) { - struct intel_forcewake_range *entry; + const struct intel_forcewake_range *table, *entry; + unsigned int num_entries; - entry = bsearch((void *)(unsigned long)offset, (const void *)ranges, - num_ranges, sizeof(struct intel_forcewake_range), + table = dev_priv->uncore.fw_domains_table; + num_entries = dev_priv->uncore.fw_domains_table_entries; + + entry = bsearch((void *)(unsigned long)offset, (const void *)table, + num_entries, sizeof(struct intel_forcewake_range), fw_range_cmp); return entry ? entry->domains : 0; } static void -intel_fw_table_check(const struct intel_forcewake_range *ranges, - unsigned int num_ranges) +intel_fw_table_check(struct drm_i915_private *dev_priv) { #ifdef CONFIG_DRM_I915_DEBUG unsigned int i; - const struct intel_forcewake_range *entry = ranges; - s32 prev = -1; + const struct intel_forcewake_range *entry; + unsigned int num_ranges; + s32 prev; + + entry = dev_priv->uncore.fw_domains_table; + if (!entry) + return; - for (i = 0; i < num_ranges; i++, entry++) { + num_ranges = dev_priv->uncore.fw_domains_table_entries; + + for (i = 0, prev = -1; i < num_ranges; i++, entry++) { WARN_ON_ONCE(prev >= (s32)entry->start); prev = entry->start; WARN_ON_ONCE(prev >= (s32)entry->end); @@ -652,8 +653,7 @@ static const struct intel_forcewake_range __vlv_fw_ranges[] = { ({ \ enum forcewake_domains __fwd = 0; \ if (NEEDS_FORCE_WAKE((offset))) \ - __fwd = find_fw_domain(offset, __vlv_fw_ranges, \ - ARRAY_SIZE(__vlv_fw_ranges)); \ + __fwd = find_fw_domain(dev_priv, offset); \ __fwd; \ }) @@ -711,8 +711,7 @@ static const struct intel_forcewake_range __chv_fw_ranges[] = { ({ \ enum forcewake_domains __fwd = 0; \ if (NEEDS_FORCE_WAKE((offset))) \ - __fwd = find_fw_domain(offset, __chv_fw_ranges, \ - ARRAY_SIZE(__chv_fw_ranges)); \ + __fwd = find_fw_domain(dev_priv, offset); \ __fwd; \ }) @@ -720,8 +719,7 @@ static const struct intel_forcewake_range __chv_fw_ranges[] = { ({ \ enum forcewake_domains __fwd = 0; \ if (NEEDS_FORCE_WAKE((offset)) && !is_gen8_shadowed(offset)) \ - __fwd = find_fw_domain(offset, __chv_fw_ranges, \ - ARRAY_SIZE(__chv_fw_ranges)); \ + __fwd = find_fw_domain(dev_priv, offset); \ __fwd; \ }) @@ -765,8 +763,7 @@ static const struct intel_forcewake_range __gen9_fw_ranges[] = { ({ \ enum forcewake_domains __fwd = 0; \ if (NEEDS_FORCE_WAKE((offset))) \ - __fwd = find_fw_domain(offset, __gen9_fw_ranges, \ - ARRAY_SIZE(__gen9_fw_ranges)); \ + __fwd = find_fw_domain(dev_priv, offset); \ __fwd; \ }) @@ -794,8 +791,7 @@ static bool is_gen9_shadowed(u32 offset) ({ \ enum forcewake_domains __fwd = 0; \ if (NEEDS_FORCE_WAKE((offset)) && !is_gen9_shadowed(offset)) \ - __fwd = find_fw_domain(offset, __gen9_fw_ranges, \ - ARRAY_SIZE(__gen9_fw_ranges)); \ + __fwd = find_fw_domain(dev_priv, offset); \ __fwd; \ }) @@ -1318,6 +1314,13 @@ static void intel_uncore_fw_domains_init(struct drm_i915_private *dev_priv) WARN_ON(dev_priv->uncore.fw_domains == 0); } +#define ASSIGN_FW_DOMAINS_TABLE(d) \ +{ \ + dev_priv->uncore.fw_domains_table = \ + (struct intel_forcewake_range *)(d); \ + dev_priv->uncore.fw_domains_table_entries = ARRAY_SIZE((d)); \ +} + void intel_uncore_init(struct drm_i915_private *dev_priv) { i915_check_vgpu(dev_priv); @@ -1331,17 +1334,13 @@ void intel_uncore_init(struct drm_i915_private *dev_priv) switch (INTEL_INFO(dev_priv)->gen) { default: case 9: - intel_fw_table_check(__gen9_fw_ranges, - ARRAY_SIZE(__gen9_fw_ranges)); - + ASSIGN_FW_DOMAINS_TABLE(__gen9_fw_ranges); ASSIGN_WRITE_MMIO_VFUNCS(gen9); ASSIGN_READ_MMIO_VFUNCS(gen9); break; case 8: if (IS_CHERRYVIEW(dev_priv)) { - intel_fw_table_check(__chv_fw_ranges, - ARRAY_SIZE(__chv_fw_ranges)); - + ASSIGN_FW_DOMAINS_TABLE(__chv_fw_ranges); ASSIGN_WRITE_MMIO_VFUNCS(chv); ASSIGN_READ_MMIO_VFUNCS(chv); @@ -1355,9 +1354,7 @@ void intel_uncore_init(struct drm_i915_private *dev_priv) ASSIGN_WRITE_MMIO_VFUNCS(gen6); if (IS_VALLEYVIEW(dev_priv)) { - intel_fw_table_check(__vlv_fw_ranges, - ARRAY_SIZE(__vlv_fw_ranges)); - + ASSIGN_FW_DOMAINS_TABLE(__vlv_fw_ranges); ASSIGN_READ_MMIO_VFUNCS(vlv); } else { ASSIGN_READ_MMIO_VFUNCS(gen6); @@ -1375,6 +1372,8 @@ void intel_uncore_init(struct drm_i915_private *dev_priv) break; } + intel_fw_table_check(dev_priv); + if (intel_vgpu_active(dev_priv)) { ASSIGN_WRITE_MMIO_VFUNCS(vgpu); ASSIGN_READ_MMIO_VFUNCS(vgpu);