| Message ID | 1476192112-25336-19-git-send-email-tvrtko.ursulin@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Oct 11, 2016 at 02:21:51PM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > > Saves 968 bytes of .rodata strings. > > v2: Add parantheses around dev_priv. (Ville Syrjala) > > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: David Weinehall <david.weinehall@linux.intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 2 +- > drivers/gpu/drm/i915/i915_gem_render_state.c | 6 +++--- > drivers/gpu/drm/i915/intel_display.c | 2 +- > drivers/gpu/drm/i915/intel_sprite.c | 8 ++++---- > 4 files changed, 9 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index f9f9a218d5fe..3f38b9755763 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -2604,8 +2604,8 @@ struct drm_i915_cmd_table { > __p; \ > }) > #define INTEL_INFO(p) (&__I915__(p)->info) > -#define INTEL_GEN(p) (INTEL_INFO(p)->gen) > > +#define INTEL_GEN(dev_priv) ((dev_priv)->info.gen) > #define INTEL_DEVID(dev_priv) ((dev_priv)->info.device_id) > > #define REVID_FOREVER 0xff > diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c > index 95b7e9afd5f8..a98c0f42badd 100644 > --- a/drivers/gpu/drm/i915/i915_gem_render_state.c > +++ b/drivers/gpu/drm/i915/i915_gem_render_state.c > @@ -72,9 +72,9 @@ render_state_get_rodata(const struct drm_i915_gem_request *req) > > static int render_state_setup(struct render_state *so) > { > - struct drm_device *dev = so->vma->vm->dev; > + struct drm_i915_private *dev_priv = to_i915(so->vma->vm->dev); > const struct intel_renderstate_rodata *rodata = so->rodata; > - const bool has_64bit_reloc = INTEL_GEN(dev) >= 8; > + const bool has_64bit_reloc = INTEL_GEN(dev_priv) >= 8; > unsigned int i = 0, reloc_index = 0; > struct page *page; > u32 *d; > @@ -115,7 +115,7 @@ static int render_state_setup(struct render_state *so) > > so->aux_batch_offset = i * sizeof(u32); > > - if (HAS_POOLED_EU(dev)) { > + if (HAS_POOLED_EU(dev_priv)) { > /* > * We always program 3x6 pool config but depending upon which > * subslice is disabled HW drops down to appropriate config > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index c3fb9f700c7a..eda38e53f68a 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -12452,7 +12452,7 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state, > struct drm_framebuffer *fb = plane_state->fb; > int ret; > > - if (INTEL_GEN(dev) >= 9 && plane->type != DRM_PLANE_TYPE_CURSOR) { > + if (INTEL_GEN(dev_priv) >= 9 && plane->type != DRM_PLANE_TYPE_CURSOR) { > ret = skl_update_scaler_plane( > to_intel_crtc_state(crtc_state), > to_intel_plane_state(plane_state)); > diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c > index f760d5fcbe48..8b4748839c07 100644 > --- a/drivers/gpu/drm/i915/intel_sprite.c > +++ b/drivers/gpu/drm/i915/intel_sprite.c > @@ -753,7 +753,7 @@ intel_check_sprite_plane(struct drm_plane *plane, > struct intel_crtc_state *crtc_state, > struct intel_plane_state *state) > { > - struct drm_device *dev = plane->dev; > + struct drm_i915_private *dev_priv = to_i915(plane->dev); > struct drm_crtc *crtc = state->base.crtc; > struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > struct intel_plane *intel_plane = to_intel_plane(plane); > @@ -797,7 +797,7 @@ intel_check_sprite_plane(struct drm_plane *plane, > } > > /* setup can_scale, min_scale, max_scale */ > - if (INTEL_INFO(dev)->gen >= 9) { > + if (INTEL_GEN(dev_priv) >= 9) { > /* use scaler when colorkey is not required */ > if (state->ckey.flags == I915_SET_COLORKEY_NONE) { > can_scale = 1; > @@ -913,7 +913,7 @@ intel_check_sprite_plane(struct drm_plane *plane, > > width_bytes = ((src_x * cpp) & 63) + src_w * cpp; > > - if (INTEL_INFO(dev)->gen < 9 && (src_w > 2048 || src_h > 2048 || > + if (INTEL_GEN(dev_priv) < 9 && (src_w > 2048 || src_h > 2048 || > width_bytes > 4096 || fb->pitches[0] > 4096)) { > DRM_DEBUG_KMS("Source dimensions exceed hardware limits\n"); > return -EINVAL; > @@ -932,7 +932,7 @@ intel_check_sprite_plane(struct drm_plane *plane, > dst->y1 = crtc_y; > dst->y2 = crtc_y + crtc_h; > > - if (INTEL_GEN(dev) >= 9) { > + if (INTEL_GEN(dev_priv) >= 9) { > ret = skl_check_plane_surface(state); > if (ret) > return ret; > -- > 2.7.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index f9f9a218d5fe..3f38b9755763 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2604,8 +2604,8 @@ struct drm_i915_cmd_table { __p; \ }) #define INTEL_INFO(p) (&__I915__(p)->info) -#define INTEL_GEN(p) (INTEL_INFO(p)->gen) +#define INTEL_GEN(dev_priv) ((dev_priv)->info.gen) #define INTEL_DEVID(dev_priv) ((dev_priv)->info.device_id) #define REVID_FOREVER 0xff diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c index 95b7e9afd5f8..a98c0f42badd 100644 --- a/drivers/gpu/drm/i915/i915_gem_render_state.c +++ b/drivers/gpu/drm/i915/i915_gem_render_state.c @@ -72,9 +72,9 @@ render_state_get_rodata(const struct drm_i915_gem_request *req) static int render_state_setup(struct render_state *so) { - struct drm_device *dev = so->vma->vm->dev; + struct drm_i915_private *dev_priv = to_i915(so->vma->vm->dev); const struct intel_renderstate_rodata *rodata = so->rodata; - const bool has_64bit_reloc = INTEL_GEN(dev) >= 8; + const bool has_64bit_reloc = INTEL_GEN(dev_priv) >= 8; unsigned int i = 0, reloc_index = 0; struct page *page; u32 *d; @@ -115,7 +115,7 @@ static int render_state_setup(struct render_state *so) so->aux_batch_offset = i * sizeof(u32); - if (HAS_POOLED_EU(dev)) { + if (HAS_POOLED_EU(dev_priv)) { /* * We always program 3x6 pool config but depending upon which * subslice is disabled HW drops down to appropriate config diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index c3fb9f700c7a..eda38e53f68a 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -12452,7 +12452,7 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state, struct drm_framebuffer *fb = plane_state->fb; int ret; - if (INTEL_GEN(dev) >= 9 && plane->type != DRM_PLANE_TYPE_CURSOR) { + if (INTEL_GEN(dev_priv) >= 9 && plane->type != DRM_PLANE_TYPE_CURSOR) { ret = skl_update_scaler_plane( to_intel_crtc_state(crtc_state), to_intel_plane_state(plane_state)); diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index f760d5fcbe48..8b4748839c07 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -753,7 +753,7 @@ intel_check_sprite_plane(struct drm_plane *plane, struct intel_crtc_state *crtc_state, struct intel_plane_state *state) { - struct drm_device *dev = plane->dev; + struct drm_i915_private *dev_priv = to_i915(plane->dev); struct drm_crtc *crtc = state->base.crtc; struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct intel_plane *intel_plane = to_intel_plane(plane); @@ -797,7 +797,7 @@ intel_check_sprite_plane(struct drm_plane *plane, } /* setup can_scale, min_scale, max_scale */ - if (INTEL_INFO(dev)->gen >= 9) { + if (INTEL_GEN(dev_priv) >= 9) { /* use scaler when colorkey is not required */ if (state->ckey.flags == I915_SET_COLORKEY_NONE) { can_scale = 1; @@ -913,7 +913,7 @@ intel_check_sprite_plane(struct drm_plane *plane, width_bytes = ((src_x * cpp) & 63) + src_w * cpp; - if (INTEL_INFO(dev)->gen < 9 && (src_w > 2048 || src_h > 2048 || + if (INTEL_GEN(dev_priv) < 9 && (src_w > 2048 || src_h > 2048 || width_bytes > 4096 || fb->pitches[0] > 4096)) { DRM_DEBUG_KMS("Source dimensions exceed hardware limits\n"); return -EINVAL; @@ -932,7 +932,7 @@ intel_check_sprite_plane(struct drm_plane *plane, dst->y1 = crtc_y; dst->y2 = crtc_y + crtc_h; - if (INTEL_GEN(dev) >= 9) { + if (INTEL_GEN(dev_priv) >= 9) { ret = skl_check_plane_surface(state); if (ret) return ret;